[Bug target/122769] RISC-V: Short branch can be elided for alu op

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122769

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
   Last reconfirmed|                            |2025-11-20
     Ever confirmed|0                           |1

--- Comment #2 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
.

        slti    a0,a0,0
        czero.eqz       a0,a3,a0
        xor     a0,a0,a1

Which I can get via:
```
uint64_t f1(uint64_t val, uint64_t val2, int bits, uint64_t n) {
  uint64_t t = -(((int64_t)val) < 0);
  val2 ^= (t&n);
  return val2;
}
```
Which does the right thing there ...