On Fri, Oct 11, 2019 at 04:17:02PM -0500, Segher Boessenkool wrote:
> On Wed, Oct 09, 2019 at 04:07:50PM -0400, Michael Meissner wrote:
> > It also adds two new predicates that disallow prefixed memory that will 
> > used in
> > patches #5 and #7.
> 
> Then you should have really introduced them in *those* patches.

I was trying to break it into smaller pieces.

> > 2019-10-08  Michael Meissner  <meiss...@linux.ibm.com>
> > 
> >     * config/rs6000/predicates.md (lwa_operand): Allow using PLWA to
> >     generate sign extend with odd offsets.
> 
> I don't understand what this means.  "Odd offsets" isn't correct, in any
> case?

Non-zero in the bottom 2/4 bits.  I'll try to come up with different words.

> > +  /* The LWA instruction uses the DS-form format where the bottom two bits 
> > of
> > +     the offset must be 0.  The prefixed PLWA does not have this
> > +     restriction.  */
> > +  if (address_is_prefixed (addr, DImode, NON_PREFIXED_DS))
> > +    return true;
> 
> DImode?

Yes, because LWA converts SImode to DImode.

> > +;; Return 1 if op is a memory operand that is not prefixed.
> > +(define_predicate "non_prefixed_memory"
> > +  (match_code "mem")
> > +{
> > +  if (!memory_operand (op, mode))
> > +    return false;
> > +
> > +  return !address_is_prefixed (XEXP (op, 0), mode, NON_PREFIXED_DEFAULT);
> > +})
> 
> This one is fine.
> 
> > +;; Return 1 if op is either a register operand or a memory operand that 
> > does
> > +;; not use a prefixed address.
> > +(define_predicate "reg_or_non_prefixed_memory"
> > +  (match_code "reg,subreg,mem")
> > +{
> > +  return (gpc_reg_operand (op, mode) || non_prefixed_memory (op, mode));
> > +})
> 
> This never allows subreg.

Gpc_reg_operand allows subreg, assuming that register_operand allows subreg.

-- 
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.ibm.com, phone: +1 (978) 899-4797

Reply via email to