On 6/15/20 5:43 PM, will schmidt wrote:
> On Mon, 2020-06-15 at 14:56 -0500, Peter Bergner via Gcc-patches wrote:
>> * config/rs6000/rs6000-cpus.def (OTHER_FUTURE_MASKS): Add
>> OPTION_MASK_MMA.
>> (POWERPC_MASKS): Likewise.
>
> Don't see POWERPC_MASKS in the patch here.
It's this hunk:
/* Support for a future processor's features. */
@@ -132,6 +133,7 @@
| OPTION_MASK_HTM \
| OPTION_MASK_ISEL \
| OPTION_MASK_MFCRF \
+ | OPTION_MASK_MMA \
| OPTION_MASK_MODULO \
| OPTION_MASK_MULHW \
| OPTION_MASK_NO_UPDATE \
>> +;; Vector load/store pair operations
>
> Probably clear later on. First blush and first pass a blurb here to
> clarify MMA, and what the modes are may be useful.
>
> The subsection paragraph from the extend.texi may be a good fit).
[snip]
>> +;; We need to define an OImode move pattern, even though we don't
>> enable it,
>> +;; because the machine independent parts of the compiler at times
>> uses the
>> +;; large integer modes.
>> +;;
>> +;; If we enable movoi, the compiler will try and use
>> it. Unfortunately, if it
>> +;; is enabled, it will cause problems on little endian systems with
>> code that
>> +;; uses the vector_size attribute, due to endian issues.
>
> So, maybe rearrange as two lines?
>
> Define a (disabled) OImode move pattern so the machine independent
> parts of the compare can use the large integer modes.
> FIXME: If the OImove pattern is enabled, LE systems will have problems
> with the vector_size attribute.
Ok, I'll take a stab at rewording this.
>> +(define_expand "movoi"
>> + [(set (match_operand:OI 0 "nonimmediate_operand")
>> + (match_operand:OI 1 "input_operand"))]
>> + "0"
>> +{
>> + gcc_unreachable ();
>> +})
>
> Is it the "0" or the _unreachable() that 'disables' this?
It's the "0" condition flag that disables it. The gcc_unreachable() call
is just used to verify we never do.
Peter
