Christophe Lyon <christophe.l...@linaro.org> writes: > On Tue, 3 Nov 2020 at 11:27, Kyrylo Tkachov via Gcc-patches > <gcc-patches@gcc.gnu.org> wrote: >> >> Hi Andrea, >> >> > -----Original Message----- >> > From: Andrea Corallo <andrea.cora...@arm.com> >> > Sent: 26 October 2020 15:59 >> > To: gcc-patches@gcc.gnu.org >> > Cc: Kyrylo Tkachov <kyrylo.tkac...@arm.com>; Richard Earnshaw >> > <richard.earns...@arm.com>; nd <n...@arm.com> >> > Subject: [PATCH 1/x] arm: Add vld1_lane_bf16 + vldq_lane_bf16 intrinsics >> > >> > Hi all, >> > >> > I'd like to submit the following patch implementing the bfloat16_t >> > neon related load intrinsics: vld1_lane_bf16, vld1q_lane_bf16. >> > >> > Please see refer to: >> > ACLE <https://developer.arm.com/docs/101028/latest> >> > ISA <https://developer.arm.com/docs/ddi0596/latest> >> > >> > Regtested and bootstrapped. >> > >> > Okay for trunk? >> > > I think you need to add -mfloat-abi=hard to the dg-additional-options > otherwise vld1_lane_bf16_1.c > fails on targets with a soft float-abi default (eg arm-linux-gnueabi). > > See bf16_vldn_1.c. > > BTW, why did you use a different naming scheme for the tests? > (bf16_vldn_1.c vs vld1_lane_bf16_1.c)
Nothing special, it made more sense to me to use directly the name of the intrinsic as it include already the bf16 information. I believe we have both schemas in the aarch64 & arm backends. I've no problem with renaming the tests if we feel is important. Andrea
