Christophe Lyon <christophe.l...@linaro.org> writes:

> On Thu, 5 Nov 2020 at 15:30, Andrea Corallo <andrea.cora...@arm.com> wrote:
>>
>> Christophe Lyon <christophe.l...@linaro.org> writes:
>>
>> > On Thu, 5 Nov 2020 at 12:11, Andrea Corallo <andrea.cora...@arm.com> wrote:
>> >>
>> >> Christophe Lyon <christophe.l...@linaro.org> writes:
>> >>
>> >> [...]
>> >>
>> >> >> I think you need to add -mfloat-abi=hard to the dg-additional-options
>> >> >> otherwise vld1_lane_bf16_1.c
>> >> >> fails on targets with a soft float-abi default (eg arm-linux-gnueabi).
>> >> >>
>> >> >> See bf16_vldn_1.c.
>> >> >
>> >> > Actually that's not sufficient because in turn we get:
>> >> > /sysroot-arm-none-linux-gnueabi/usr/include/gnu/stubs.h:10:11: fatal
>> >> > error: gnu/stubs-hard.h: No such file or directory
>> >> >
>> >> > So you should check that -mfloat-abi=hard is supported.
>> >> >
>> >> > Ditto for the vst tests.
>> >>
>> >> Hi Christophe,
>> >>
>> >> this patch should implement your suggestions.
>> >>
>> >> On my arm-none-linux-gnueabi setup the tests were already skipped
>> >> as unsupported so if you could test and confirm this fixes the
>> >> issue you see would be great.
>> >
>> > Do you know why they are unsupported in your setup?
>>
>> We probably have a different GCC configuration.  Could you share how
>> it's configured your?
>>
> Sure, for instance:
> --target=arm-none-linux-gnueabi --with-float=soft --with-mode=arm
> --with-cpu=cortex-a9

Thanks, I see now what was going on, my gas has no bf16 support so the
test was marked as unsupported.  Dunno why I assumed
check_no_compiler_messages_nocache wasn't testing the whole compilation
process.

>> >> diff --git a/gcc/testsuite/lib/target-supports.exp 
>> >> b/gcc/testsuite/lib/target-supports.exp
>> >> index 15f0649f8ae..2ab7e39756d 100644
>> >> --- a/gcc/testsuite/lib/target-supports.exp
>> >> +++ b/gcc/testsuite/lib/target-supports.exp
>> >> @@ -5213,6 +5213,10 @@ proc 
>> >> check_effective_target_arm_v8_2a_bf16_neon_ok_nocache { } {
>> >>          return 0;
>> >>      }
>> >>
>> >> +    if { ! [check_effective_target_arm_hard_ok] } {
>> >> + return 0;
>> >> +    }
>> >> +
>> >>     foreach flags {"" "-mfloat-abi=hard -mfpu=neon-fp-armv8" 
>> >> "-mfloat-abi=softfp -mfpu=neon-fp-armv8" } {
>> >>         if { [check_no_compiler_messages_nocache arm_v8_2a_bf16_neon_ok 
>> >> object {
>> >>             #include <arm_neon.h>
>> >
>> > This seems strange since you would now exit early if
>> > check_effective_target_arm_hard_ok is false, so you'll never need the
>> > -mfloat-abi=softfp version of the flags.
>>
>> So IIUC your suggestion would be to test with higher priority softfp and
>> in case we decide to go for hardfp make sure
>> check_effective_target_arm_hard_ok is satisfied.  Am I correct?
>>
> ISTM that other tests that need hardfp check if it's supported in the
> test, not in other effective targets.
>
> For instance mve/intrinsics/mve_fpu1.c
>
> I can see that quite a few tests that use -mfloat-abi=hard do not
> check whether it's supported. Those I checked do not include
> arm_neon.h and thus do not end up with the gnu/stubs-hard.h error
> above.

I see thanks for the explaination.  The attached should do the job.

  Andrea

>From 1fc3854d1cb48840d7b8db9fcf7b2997a25f35f4 Mon Sep 17 00:00:00 2001
From: Andrea Corallo <andrea.cora...@arm.com>
Date: Thu, 5 Nov 2020 08:57:03 +0000
Subject: [PATCH] arm: [testcase] Better narrow some bfloat16 testcase

2020-11-05  Andrea Corallo  <andrea.cora...@arm.com>

        * gcc.target/arm/simd/vld1_lane_bf16_1.c: Require target to
        support and add -mfloat-abi=hard flag.
        * gcc.target/arm/simd/vld1_lane_bf16_indices_1.c: Likewise.
        * gcc.target/arm/simd/vld1q_lane_bf16_indices_1.c: Likewise.
        * gcc.target/arm/simd/vst1_lane_bf16_1.c: Likewise.
        * gcc.target/arm/simd/vst1_lane_bf16_indices_1.c: Likewise.
        * gcc.target/arm/simd/vstq1_lane_bf16_indices_1.c: Likewise.
---
 gcc/testsuite/gcc.target/arm/simd/vld1_lane_bf16_1.c          | 3 ++-
 gcc/testsuite/gcc.target/arm/simd/vld1_lane_bf16_indices_1.c  | 2 ++
 gcc/testsuite/gcc.target/arm/simd/vld1q_lane_bf16_indices_1.c | 2 ++
 gcc/testsuite/gcc.target/arm/simd/vst1_lane_bf16_1.c          | 3 ++-
 gcc/testsuite/gcc.target/arm/simd/vst1_lane_bf16_indices_1.c  | 2 ++
 gcc/testsuite/gcc.target/arm/simd/vstq1_lane_bf16_indices_1.c | 2 ++
 6 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1_lane_bf16_1.c 
b/gcc/testsuite/gcc.target/arm/simd/vld1_lane_bf16_1.c
index fa4e45b7217..94fb38f32b8 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vld1_lane_bf16_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vld1_lane_bf16_1.c
@@ -1,7 +1,8 @@
 /* { dg-do assemble } */
 /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
+/* { dg-require-effective-target arm_hard_ok } */
 /* { dg-add-options arm_v8_2a_bf16_neon } */
-/* { dg-additional-options "-O3 --save-temps" } */
+/* { dg-additional-options "-O3 --save-temps -mfloat-abi=hard" } */
 
 #include "arm_neon.h"
 
diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1_lane_bf16_indices_1.c 
b/gcc/testsuite/gcc.target/arm/simd/vld1_lane_bf16_indices_1.c
index c83eb53234d..d9af512cf92 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vld1_lane_bf16_indices_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vld1_lane_bf16_indices_1.c
@@ -1,6 +1,8 @@
 /* { dg-do assemble } */
 /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
+/* { dg-require-effective-target arm_hard_ok } */
 /* { dg-add-options arm_v8_2a_bf16_neon } */
+/* { dg-additional-options "-mfloat-abi=hard" } */
 
 #include "arm_neon.h"
 
diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1q_lane_bf16_indices_1.c 
b/gcc/testsuite/gcc.target/arm/simd/vld1q_lane_bf16_indices_1.c
index 8e21e61c9c0..a73184c0f78 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vld1q_lane_bf16_indices_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vld1q_lane_bf16_indices_1.c
@@ -1,6 +1,8 @@
 /* { dg-do assemble } */
 /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
+/* { dg-require-effective-target arm_hard_ok } */
 /* { dg-add-options arm_v8_2a_bf16_neon } */
+/* { dg-additional-options "-mfloat-abi=hard" } */
 
 #include "arm_neon.h"
 
diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1_lane_bf16_1.c 
b/gcc/testsuite/gcc.target/arm/simd/vst1_lane_bf16_1.c
index e018ec6592f..8564b8fa062 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vst1_lane_bf16_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vst1_lane_bf16_1.c
@@ -1,7 +1,8 @@
 /* { dg-do assemble } */
 /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
+/* { dg-require-effective-target arm_hard_ok } */
 /* { dg-add-options arm_v8_2a_bf16_neon } */
-/* { dg-additional-options "-O3 --save-temps" } */
+/* { dg-additional-options "-O3 --save-temps -mfloat-abi=hard" } */
 
 #include "arm_neon.h"
 
diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1_lane_bf16_indices_1.c 
b/gcc/testsuite/gcc.target/arm/simd/vst1_lane_bf16_indices_1.c
index 39870dc054c..1bd68718d10 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vst1_lane_bf16_indices_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vst1_lane_bf16_indices_1.c
@@ -1,6 +1,8 @@
 /* { dg-do assemble } */
 /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
+/* { dg-require-effective-target arm_hard_ok } */
 /* { dg-add-options arm_v8_2a_bf16_neon } */
+/* { dg-additional-options "-mfloat-abi=hard" } */
 
 #include "arm_neon.h"
 
diff --git a/gcc/testsuite/gcc.target/arm/simd/vstq1_lane_bf16_indices_1.c 
b/gcc/testsuite/gcc.target/arm/simd/vstq1_lane_bf16_indices_1.c
index f31bd120fc2..f18a4792a14 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vstq1_lane_bf16_indices_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vstq1_lane_bf16_indices_1.c
@@ -1,6 +1,8 @@
 /* { dg-do assemble } */
 /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
+/* { dg-require-effective-target arm_hard_ok } */
 /* { dg-add-options arm_v8_2a_bf16_neon } */
+/* { dg-additional-options "-mfloat-abi=hard" } */
 
 #include "arm_neon.h"
 
-- 
2.20.1

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