On May 19, 2006, at 12:48 PM, sean yang wrote:
Although "BASIC_BLOCK array contains BBs in an unspecified order"
as the GCC internal doc says, can I assume that the final virtual
address for an instruction in BB_m is always higher than the
virtual address for an instruction in BB_n, when m < n. (Let's
assume the linker for the target machine produce code from low
address to high address.)
Definitely not.
Various phases that need to know the order of insns produce a CUID
for that phase, but it is not maintained globally.
