On Wed, Jan 12, 2011 at 8:27 AM, Ian Lance Taylor <i...@google.com> wrote:
> Gidi Nave <gidi.nav...@gmail.com> writes:
>
>> On Tue, Jan 11, 2011 at 7:22 PM, Ian Lance Taylor <i...@google.com> wrote:
>>> Gidi Nave <gidi.nav...@gmail.com> writes:
>>>
>>>> On Tue, Jan 11, 2011 at 5:34 PM, Ian Lance Taylor <i...@google.com> wrote:
>>>>
>>>>> So why doesn't d1 = d1 + -96 match the last instruction there?
>>>>>
>>>> because it's:    add d,d unsigned
>>>> we don't have:  add d,d signed
>>>>
>>>> and in this case we need: d = r + (-96)
>>>
>>> Addition of signed and unsigned numbers is the same operation at the
>>> machine level.  Are there limitations on the signed value?  If so, is
>>> there is a sub instruction?
>>
>> There are limitation for the signed value for D class registers.
>> There is a sub instruction for D registers, but it's limited to U5
>> (unsigned of 5 bits) which is not the case here.
>
> Thanks.  Since we don't know the details of your processor, we could be
> more helpful if you provided this sort of information up front.  It
> sounds like you are saying that there is no way to subtract 96 without
> using an extra register.  Is that correct?
>
> If that is the case, then I agree with Jeff that you are going to need
> to define a secondary reload.  Look at TARGET_SECONDARY_RELOAD in the
> docs.
>
> By the way, if the restrictions on addition (which you did not describe)
> are less severe than the restrictions on subtraction, then you should
> consider adjusting your frame pointer so that most stack slots are at a
> positive offset rather than a negative one.  I don't know if that is
> what is going on here, though a negative offset is certainly unusual.
>
> Ian
>


Hi Ian,

There is no way to subtract 96 without the extra register.

The secondary reload worked great !!! Thanks!

Regarding the frame pointer - in my case it was the frame pointer but
our addition/subtract instructions
options are similar (for the same register classes), so adjusting the
frame pointer won't do any good.

One more question:
GCC usually knows how to handle cases which need decomposition of
expressions due to architecture limitations.
In my case it didn't know.
How can I foreseen additional such cases, in order to avoid compilation crush?

Thanks,
Gidi.

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