On 23/05/14 07:23, Richard Henderson wrote:
> On 05/22/2014 03:12 AM, Jakub Jelinek wrote:
>> No way. SUBREG_PROMOTED_UNSIGNED_P right now resides in two separate bits,
>> volatil and unchanging. Right now volatile != 0, unchanging ignored
>> is -1, volatile == 0, then the value is unchanging.
>> What I meant is change this representation, e.g. to
>> x->volatil * 2 + x->unchanging - 1
>> so you can represent the values -1, 0, 1, 2 in there.
>> Of course, adjust SUBREG_PROMOTED_UNSIGNED_SET correspondingly too.
>> As SUBREG_PROMOTED_UNSIGNED_P is only valid if SUBREG_PROMOTED_VAR_P,
>> I'd hope that you don't need to care about what 0, 0 in those bits
>> means, because everything should actually SUBREG_PROMOTED_UNSIGNED_SET
>> around setting SUBREG_PROMOTED_VAR_P to non-zero.
>
> It would be helpful to redo these, now that we don't simply have a tri-state
> value.
>
> const unsigned int SRP_POINTER = 0;
> const unsigned int SRP_SIGNED = 1;
> const unsigned int SRP_UNSIGNED = 2;
>
> #define SUBREG_PROMOTED_SET(RTX, VAL) \
> do { \
> rtx const _rtx = RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_SET", \
> (RTX), SUBREG); \
> unsigned int _val = (VAL); \
> _rtx->volatil = _val; \
> _rtx->unchanging = _val >> 1; \
> } while (0)
>
> #define SUBREG_PROMOTED_GET(RTX) \
> ({ const rtx _rtx = RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_GET", \
> (RTX), SUBREG); \
> _rtx->volail + _rtx->unchanging * 2; \
> })
>
> The bits are arranged such that e.g.
>
> SUBREG_PROMOTED_GET (x) & SRP_UNSIGNED
>
> is meaningful. For conciseness, we'd probably want
>
> SUBREG_PROMOTED_POINTER_P
> SUBREG_PROMOTED_UNSIGNED_P
> SUBREG_PROMOTED_SIGNED_P
>
> as boolean macros. I dunno if "both" (whatever you want to call that) is used
> enough to warrant its own macro. I can more often see this being used when
> examining a given ZERO_/SIGN_EXTEND rtx, so "both" probably won't come up.
Thanks for the information.
#define SUBREG_PROMOTED_UNSIGNED_P(RTX) \
({ const rtx _rtx = RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_UNSIGNED_P",
(RTX), SUBREG); \
(((_rtx->volatil + _rtx->unchanging) == 0) ? -1 : (_rtx->volatil == 1));})
when I tried this macros, I started getting "warning: ISO C++ forbids
braced-groups within expressions [-Wpedantic]", Therefore I changed it to
#define SUBREG_PROMOTED_UNSIGNED_P(RTX) \
((((RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_UNSIGNED_P", (RTX),
SUBREG)->volatil)\
+ (RTX)->unchanging) == 0) ? -1 : ((RTX)->volatil == 1))
I also kept the SRP_POINTER, SRP_SIGNED etc. as below. This is similar
to the sign values we get from tree and same as what is used currently.
We therefore don’t have to translate between them.
I am however, changing the internal values (of volatil and unchanging)
similar to what we will get with SRP_SIGNED=1 and SRP_UNSIGNED = 2.
Attached patch has the rest of the modifications. Regression tested on
arm and x86_64. In arm there is still one failure
(gcc.dg/fixed-point/convert-sat.c).
const unsigned int SRP_POINTER = -1;
const unsigned int SRP_SIGNED = 0;
const unsigned int SRP_UNSIGNED = 1;
const unsigned int SRP_SIGNED_AND_UNSIGNED = 2;
#define SUBREG_PROMOTED_SET(RTX, VAL) \
do { \
rtx const _rtx = RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_SET", \
(RTX), SUBREG); \
switch ((VAL)) \
{ \
case SRP_POINTER: \
_rtx->volatil = 0; \
_rtx->unchanging = 0; \
break; \
case SRP_SIGNED: \
_rtx->volatil = 0; \
_rtx->unchanging = 1; \
break; \
case SRP_UNSIGNED: \
_rtx->volatil = 1; \
_rtx->unchanging = 0; \
break; \
case SRP_SIGNED_AND_UNSIGNED: \
_rtx->volatil = 1; \
_rtx->unchanging = 1; \
break; \
} \
} while (0)
#define SUBREG_PROMOTED_GET(RTX) \
(2 * ((RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_GET", (RTX), SUBREG))->volatil)\
+ (RTX)->unchanging - 1)
#define SUBREG_PROMOTED_SIGNED_P(RTX) \
((((RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_SIGNED_P", (RTX), SUBREG)->volatil)\
+ (RTX)->unchanging) == 0) ? 0 : ((RTX)->unchanging == 1))
#define SUBREG_PROMOTED_UNSIGNED_P(RTX) \
((((RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_UNSIGNED_P", (RTX),
SUBREG)->volatil)\
+ (RTX)->unchanging) == 0) ? -1 : ((RTX)->volatil == 1))
#define SUBREG_CHECK_PROMOTED_SIGN(RTX, SIGN) \
((SIGN) ? SUBREG_PROMOTED_UNSIGNED_P((RTX))\
: SUBREG_PROMOTED_SIGNED_P((RTX))) \
Does this look reasonable?
Thanks,
Kugan
diff --git a/gcc/calls.c b/gcc/calls.c
index 78fe7d8..a1e7468 100644
--- a/gcc/calls.c
+++ b/gcc/calls.c
@@ -1484,8 +1484,11 @@ precompute_arguments (int num_actuals, struct arg_data
*args)
args[i].initial_value
= gen_lowpart_SUBREG (mode, args[i].value);
SUBREG_PROMOTED_VAR_P (args[i].initial_value) = 1;
- SUBREG_PROMOTED_UNSIGNED_SET (args[i].initial_value,
- args[i].unsignedp);
+
+ if (is_promoted_for_type (args[i].tree_value, mode,
!args[i].unsignedp))
+ SUBREG_PROMOTED_SET (args[i].initial_value,
SRP_SIGNED_AND_UNSIGNED);
+ else
+ SUBREG_PROMOTED_SET (args[i].initial_value, args[i].unsignedp);
}
}
}
@@ -3365,7 +3368,8 @@ expand_call (tree exp, rtx target, int ignore)
target = gen_rtx_SUBREG (TYPE_MODE (type), target, offset);
SUBREG_PROMOTED_VAR_P (target) = 1;
- SUBREG_PROMOTED_UNSIGNED_SET (target, unsignedp);
+ SUBREG_PROMOTED_SET (target, unsignedp);
+
}
/* If size of args is variable or this was a constructor call for a stack
diff --git a/gcc/expr.c b/gcc/expr.c
index d99bc1e..7a1a2b9 100644
--- a/gcc/expr.c
+++ b/gcc/expr.c
@@ -328,7 +328,7 @@ convert_move (rtx to, rtx from, int unsignedp)
if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
&& (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from)))
>= GET_MODE_PRECISION (to_mode))
- && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
+ && (SUBREG_CHECK_PROMOTED_SIGN (from, unsignedp)))
from = gen_lowpart (to_mode, from), from_mode = to_mode;
gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
@@ -702,7 +702,7 @@ convert_modes (enum machine_mode mode, enum machine_mode
oldmode, rtx x, int uns
if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
&& GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
- && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
+ && (SUBREG_CHECK_PROMOTED_SIGN (x, unsignedp)))
x = gen_lowpart (mode, SUBREG_REG (x));
if (GET_MODE (x) != VOIDmode)
@@ -4375,6 +4375,7 @@ emit_push_insn (rtx x, enum machine_mode mode, tree type,
rtx size,
{
/* Handle calls that pass values in multiple non-contiguous locations.
The Irix 6 ABI has examples of this. */
+
if (GET_CODE (reg) == PARALLEL)
emit_group_load (reg, x, type, -1);
else
@@ -5201,8 +5202,7 @@ store_expr (tree exp, rtx target, int call_param_p, bool
nontemporal)
&& GET_MODE_PRECISION (GET_MODE (target))
== TYPE_PRECISION (TREE_TYPE (exp)))
{
- if (TYPE_UNSIGNED (TREE_TYPE (exp))
- != SUBREG_PROMOTED_UNSIGNED_P (target))
+ if (!(SUBREG_CHECK_PROMOTED_SIGN (target, TYPE_UNSIGNED (TREE_TYPE
(exp)))))
{
/* Some types, e.g. Fortran's logical*4, won't have a signed
version, so use the mode instead. */
@@ -9209,6 +9209,52 @@ expand_expr_real_2 (sepops ops, rtx target, enum
machine_mode tmode,
}
#undef REDUCE_BIT_FIELD
+/* Return TRUE if value in RHS is already zero/sign extended for lhs type
+ (type here is the combination of LHS_MODE and LHS_UNS) using value range
+ information stored in RHS. Return FALSE otherwise. */
+bool
+is_promoted_for_type (tree rhs, enum machine_mode lhs_mode, bool lhs_uns)
+{
+ wide_int type_min, type_max;
+ wide_int min, max;
+ unsigned int prec;
+ tree lhs_type;
+ bool rhs_uns;
+
+ if (flag_wrapv
+ || (rhs == NULL_TREE)
+ || (TREE_CODE (rhs) != SSA_NAME)
+ || !INTEGRAL_TYPE_P (TREE_TYPE (rhs))
+ || POINTER_TYPE_P (TREE_TYPE (rhs))
+ || (get_range_info (rhs, &min, &max) != VR_RANGE))
+ return false;
+
+ lhs_type = lang_hooks.types.type_for_mode (lhs_mode, lhs_uns);
+ rhs_uns = TYPE_UNSIGNED (TREE_TYPE (rhs));
+
+ prec = min.get_precision ();
+ type_min = wide_int::from (TYPE_MIN_VALUE (lhs_type), prec, TYPE_SIGN
(lhs_type));
+ type_max = wide_int::from (TYPE_MAX_VALUE (lhs_type), prec, TYPE_SIGN
(lhs_type));
+
+ /* Signedness of LHS and RHS differs but values in RHS match. */
+ if ((rhs_uns != lhs_uns)
+ && ((rhs_uns && !wi::neg_p (min, TYPE_SIGN (lhs_type)))
+ || (!rhs_uns && wi::neg_p (max, TYPE_SIGN (lhs_type)))))
+ rhs_uns = !rhs_uns;
+
+ /* Signedness of LHS and RHS should match. */
+ if (rhs_uns != lhs_uns)
+ return false;
+
+ /* Check if values lies in-between the type range. */
+ if ((wi::cmp (max, type_max, TYPE_SIGN (lhs_type)) == -1)
+ && (((wi::cmp (type_min, min, TYPE_SIGN (lhs_type))) == -1)
+ || (lhs_uns && wi::cmp (type_min, min, TYPE_SIGN (lhs_type)) == 0)))
+ return true;
+
+ return false;
+}
+
/* Return TRUE if expression STMT is suitable for replacement.
Never consider memory loads as replaceable, because those don't ever lead
@@ -9512,7 +9558,12 @@ expand_expr_real_1 (tree exp, rtx target, enum
machine_mode tmode,
temp = gen_lowpart_SUBREG (mode, decl_rtl);
SUBREG_PROMOTED_VAR_P (temp) = 1;
- SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
+
+ if (is_promoted_for_type (ssa_name, mode, !unsignedp))
+ SUBREG_PROMOTED_SET (temp, SRP_SIGNED_AND_UNSIGNED);
+ else
+ SUBREG_PROMOTED_SET (temp, unsignedp);
+
return temp;
}
diff --git a/gcc/expr.h b/gcc/expr.h
index 1823feb..8ed72a6 100644
--- a/gcc/expr.h
+++ b/gcc/expr.h
@@ -454,6 +454,7 @@ extern rtx expand_expr_real_1 (tree, rtx, enum machine_mode,
enum expand_modifier, rtx *, bool);
extern rtx expand_expr_real_2 (sepops, rtx, enum machine_mode,
enum expand_modifier);
+extern bool is_promoted_for_type (tree, enum machine_mode, bool);
/* Generate code for computing expression EXP.
An rtx for the computed value is returned. The value is never null.
diff --git a/gcc/function.c b/gcc/function.c
index ec2ea26..25feed5 100644
--- a/gcc/function.c
+++ b/gcc/function.c
@@ -3083,7 +3083,7 @@ assign_parm_setup_reg (struct assign_parm_data_all *all,
tree parm,
/* The argument is already sign/zero extended, so note it
into the subreg. */
SUBREG_PROMOTED_VAR_P (tempreg) = 1;
- SUBREG_PROMOTED_UNSIGNED_SET (tempreg, unsignedp);
+ SUBREG_PROMOTED_SET (tempreg, unsignedp);
}
/* TREE_USED gets set erroneously during expand_assignment. */
diff --git a/gcc/ifcvt.c b/gcc/ifcvt.c
index 2ca2278..4f16dff 100644
--- a/gcc/ifcvt.c
+++ b/gcc/ifcvt.c
@@ -1448,8 +1448,11 @@ noce_emit_cmove (struct noce_if_info *if_info, rtx x,
enum rtx_code code,
|| byte_vtrue != byte_vfalse
|| (SUBREG_PROMOTED_VAR_P (vtrue)
!= SUBREG_PROMOTED_VAR_P (vfalse))
- || (SUBREG_PROMOTED_UNSIGNED_P (vtrue)
- != SUBREG_PROMOTED_UNSIGNED_P (vfalse)))
+ || ((SUBREG_PROMOTED_UNSIGNED_P (vtrue)
+ != SUBREG_PROMOTED_UNSIGNED_P (vfalse))
+ && (SUBREG_PROMOTED_SIGNED_P (vtrue)
+ != SUBREG_PROMOTED_SIGNED_P (vfalse))))
+
return NULL_RTX;
promoted_target = gen_reg_rtx (GET_MODE (reg_vtrue));
@@ -1463,7 +1466,7 @@ noce_emit_cmove (struct noce_if_info *if_info, rtx x,
enum rtx_code code,
target = gen_rtx_SUBREG (GET_MODE (vtrue), promoted_target, byte_vtrue);
SUBREG_PROMOTED_VAR_P (target) = SUBREG_PROMOTED_VAR_P (vtrue);
- SUBREG_PROMOTED_UNSIGNED_SET (target, SUBREG_PROMOTED_UNSIGNED_P
(vtrue));
+ SUBREG_PROMOTED_SET (target, SUBREG_PROMOTED_GET (vtrue));
emit_move_insn (x, target);
return x;
}
diff --git a/gcc/internal-fn.c b/gcc/internal-fn.c
index 68b2b66..a4c1c87 100644
--- a/gcc/internal-fn.c
+++ b/gcc/internal-fn.c
@@ -576,12 +576,12 @@ ubsan_expand_si_overflow_mul_check (gimple stmt)
if (GET_CODE (lopart0) == SUBREG)
{
SUBREG_PROMOTED_VAR_P (lopart0) = 1;
- SUBREG_PROMOTED_UNSIGNED_SET (lopart0, 0);
+ SUBREG_PROMOTED_SET (lopart0, 0);
}
if (GET_CODE (lopart1) == SUBREG)
{
SUBREG_PROMOTED_VAR_P (lopart1) = 1;
- SUBREG_PROMOTED_UNSIGNED_SET (lopart1, 0);
+ SUBREG_PROMOTED_SET (lopart1, 0);
}
tree halfstype = build_nonstandard_integer_type (hprec, 0);
ops.op0 = make_tree (halfstype, lopart0);
diff --git a/gcc/optabs.c b/gcc/optabs.c
index ca1c194..da07afa 100644
--- a/gcc/optabs.c
+++ b/gcc/optabs.c
@@ -368,7 +368,7 @@ widen_operand (rtx op, enum machine_mode mode, enum
machine_mode oldmode,
a promoted object differs from our extension. */
if (! no_extend
|| (GET_CODE (op) == SUBREG && SUBREG_PROMOTED_VAR_P (op)
- && SUBREG_PROMOTED_UNSIGNED_P (op) == unsignedp))
+ && (SUBREG_CHECK_PROMOTED_SIGN (op, unsignedp))))
return convert_modes (mode, oldmode, op, unsignedp);
/* If MODE is no wider than a single word, we return a lowpart or paradoxical
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 51cfae5..9cfaa01 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -1582,32 +1582,64 @@ get_full_set_src_cost (rtx x, struct full_rtx_costs *c)
When used as a LHS, is means that this extension must be done
when assigning to SUBREG_REG. */
+const unsigned int SRP_POINTER = -1;
+const unsigned int SRP_SIGNED = 0;
+const unsigned int SRP_UNSIGNED = 1;
+const unsigned int SRP_SIGNED_AND_UNSIGNED = 2;
+
#define SUBREG_PROMOTED_VAR_P(RTX) \
(RTL_FLAG_CHECK1 ("SUBREG_PROMOTED", (RTX), SUBREG)->in_struct)
-#define SUBREG_PROMOTED_UNSIGNED_SET(RTX, VAL) \
-do { \
- rtx const _rtx = RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_UNSIGNED_SET", \
- (RTX), SUBREG); \
- if ((VAL) < 0) \
- _rtx->volatil = 1; \
- else { \
- _rtx->volatil = 0; \
- _rtx->unchanging = (VAL); \
+#define SUBREG_PROMOTED_SET(RTX, VAL) \
+do { \
+ rtx const _rtx = RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_SET", \
+ (RTX), SUBREG); \
+ switch ((VAL)) \
+ { \
+ case SRP_POINTER: \
+ _rtx->volatil = 0; \
+ _rtx->unchanging = 0; \
+ break; \
+ case SRP_SIGNED: \
+ _rtx->volatil = 0; \
+ _rtx->unchanging = 1; \
+ break; \
+ case SRP_UNSIGNED: \
+ _rtx->volatil = 1; \
+ _rtx->unchanging = 0; \
+ break; \
+ case SRP_SIGNED_AND_UNSIGNED: \
+ _rtx->volatil = 1; \
+ _rtx->unchanging = 1; \
+ break; \
} \
} while (0)
/* Valid for subregs which are SUBREG_PROMOTED_VAR_P(). In that case
this gives the necessary extensions:
- 0 - signed
- 1 - normal unsigned
+ 0 - signed (SPR_SIGNED)
+ 1 - normal unsigned (SPR_UNSIGNED)
+ 2 - value is both sign and unsign extended for mode
+ (SPR_SIGNED_AND_UNSIGNED).
-1 - pointer unsigned, which most often can be handled like unsigned
extension, except for generating instructions where we need to
- emit special code (ptr_extend insns) on some architectures. */
+ emit special code (ptr_extend insns) on some architectures
+ (SPR_POINTER). */
+#define SUBREG_PROMOTED_GET(RTX) \
+ (2 * ((RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_GET", (RTX), SUBREG))->volatil)\
+ + (RTX)->unchanging - 1)
+
+#define SUBREG_PROMOTED_SIGNED_P(RTX) \
+ ((((RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_SIGNED_P", (RTX), SUBREG)->volatil)\
+ + (RTX)->unchanging) == 0) ? 0 : ((RTX)->unchanging == 1))
#define SUBREG_PROMOTED_UNSIGNED_P(RTX) \
- ((RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_UNSIGNED_P", (RTX), SUBREG)->volatil) \
- ? -1 : (int) (RTX)->unchanging)
+ ((((RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_UNSIGNED_P", (RTX), SUBREG)->volatil)\
+ + (RTX)->unchanging) == 0) ? -1 : ((RTX)->volatil == 1))
+
+#define SUBREG_CHECK_PROMOTED_SIGN(RTX, SIGN) \
+ ((SIGN) ? SUBREG_PROMOTED_UNSIGNED_P((RTX))\
+ : SUBREG_PROMOTED_SIGNED_P((RTX))) \
/* True if the subreg was generated by LRA for reload insns. Such
subregs are valid only during LRA. */
diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c
index 82cfc1bf..547bdbf 100644
--- a/gcc/rtlanal.c
+++ b/gcc/rtlanal.c
@@ -4619,7 +4619,7 @@ num_sign_bit_copies1 (const_rtx x, enum machine_mode
mode, const_rtx known_x,
and we are looking at it in a wider mode, we know that at least the
high-order bits are known to be sign bit copies. */
- if (SUBREG_PROMOTED_VAR_P (x) && ! SUBREG_PROMOTED_UNSIGNED_P (x))
+ if (SUBREG_PROMOTED_VAR_P (x) && SUBREG_PROMOTED_SIGNED_P (x))
{
num0 = cached_num_sign_bit_copies (SUBREG_REG (x), mode,
known_x, known_mode, known_ret);
diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c
index 181b56f..81d196f 100644
--- a/gcc/simplify-rtx.c
+++ b/gcc/simplify-rtx.c
@@ -1352,7 +1352,7 @@ simplify_unary_operation_1 (enum rtx_code code, enum
machine_mode mode, rtx op)
target mode is the same as the variable's promotion. */
if (GET_CODE (op) == SUBREG
&& SUBREG_PROMOTED_VAR_P (op)
- && ! SUBREG_PROMOTED_UNSIGNED_P (op)
+ && SUBREG_PROMOTED_SIGNED_P (op)
&& GET_MODE_SIZE (mode) <= GET_MODE_SIZE (GET_MODE (XEXP (op, 0))))
{
temp = rtl_hooks.gen_lowpart_no_emit (mode, op);
@@ -5595,8 +5595,7 @@ simplify_subreg (enum machine_mode outermode, rtx op,
&& subreg_lowpart_p (newx))
{
SUBREG_PROMOTED_VAR_P (newx) = 1;
- SUBREG_PROMOTED_UNSIGNED_SET
- (newx, SUBREG_PROMOTED_UNSIGNED_P (op));
+ SUBREG_PROMOTED_SET (newx, SUBREG_PROMOTED_GET (op));
}
return newx;
}
