2015-05-22 11:53 GMT+03:00 Ilya Enkovich <[email protected]>:
> 2015-05-21 22:08 GMT+03:00 Vladimir Makarov <[email protected]>:
>> So, Ilya, to solve the problem you need to avoid sharing subregs for the
>> correct LRA/reload work.
>>
>>
>
> Thanks a lot for your help! I'll fix it.
>
> Ilya
I've fixed SUBREG sharing and got a missing spill. I added
--enable-checking=rtl to check other possible bugs. Spill/fill code
still seems incorrect because different sizes are used. Shouldn't
block me though.
.L5:
movl 16(%esp), %eax
addl $8, %esi
movl 20(%esp), %edx
movl %eax, (%esp)
movl %edx, 4(%esp)
call counter@PLT
movq -8(%esi), %xmm0
**movdqa 16(%esp), %xmm2**
pand %xmm0, %xmm2
movdqa %xmm2, %xmm0
movd %xmm2, %edx
**movq %xmm2, 16(%esp)**
psrlq $32, %xmm0
movd %xmm0, %eax
orl %edx, %eax
jne .L5
Thanks,
Ilya
