> The phrase "doesn't scale" comes to mind. For memory I manually re-route connections in gschem after figuring out what makes sense in pcb; then load the new netlist and let pcb complain about whatever needs moving to make it so.
> There is a level of abstraction missing. Something like a "permutable" > attribute. So a 74as30 might have: > > permute=a:1,b:2,c:3,d:4,e:5,f:6,g:11,h:12 > > as a default, mapping pin names to pin numbers. The "net list tool" > could munge the attribute to a new mapping and then back-annotation is > simply replacing the attribute with the new mapping. gschem needs some > smarts similar to slotting to put the right pins on the schematics. In my examples, I've been using sub-slotting for my pin maps. That syntax isn't properly parseable, but perhaps something like this would be... Example 7410: ([1,2,13],12),([3,4,5],6),([9,10,11],8) Where () groups a slot, and [] groups permutable pins? So a dual 2-bit latch might be: ([(1,2),(3,4)],5,6),([(13,12),(11,10)],9,8) Meaning: Two latches: [(1,2),(3,4)],5,6 [(13,12),(11,10)],9,8 Each latch has two permutable cells: [(1,2),(3,4)] Within each cell, there are two sub-slots: 1,2 3,4 The advantage of this is that we can tell gschem to ignore the [] characters and start accepting this syntax *now*, at least for simple parts without sub-slots. _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user