On Monday 21 January 2008, John Doty wrote: > the extracted > netlists from the layout correspond to schematics that are > humanly incomprehensible!
That is why the preferred approach is to back-annotate layout differences to the original schematic. > But again, I am very far from the > VLSI "mainstream". :-) _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user