changeset 530ff1bc8d70 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=530ff1bc8d70
description:
ExecContext: Get rid of the now unused read/write templated functions.
diffstat:
src/cpu/base_dyn_inst.hh | 49 ------------
src/cpu/exec_context.hh | 11 --
src/cpu/inorder/inorder_dyn_inst.cc | 136 ---------------------------------
src/cpu/inorder/inorder_dyn_inst.hh | 21 -----
src/cpu/simple/atomic.cc | 140 ----------------------------------
src/cpu/simple/atomic.hh | 6 -
src/cpu/simple/timing.cc | 145 +----------------------------------
src/cpu/simple/timing.hh | 11 --
8 files changed, 7 insertions(+), 512 deletions(-)
diffs (truncated from 674 to 300 lines):
diff -r b1f3dfae06f1 -r 530ff1bc8d70 src/cpu/base_dyn_inst.hh
--- a/src/cpu/base_dyn_inst.hh Sat Jul 02 22:34:29 2011 -0700
+++ b/src/cpu/base_dyn_inst.hh Sat Jul 02 22:34:58 2011 -0700
@@ -124,29 +124,8 @@
cpu->demapPage(vaddr, asn);
}
- /**
- * Does a read to a given address.
- * @param addr The address to read.
- * @param data The read's data is written into this parameter.
- * @param flags The request's flags.
- * @return Returns any fault due to the read.
- */
- template <class T>
- Fault read(Addr addr, T &data, unsigned flags);
-
Fault readBytes(Addr addr, uint8_t *data, unsigned size, unsigned flags);
- /**
- * Does a write to a given address.
- * @param data The data to be written.
- * @param addr The address to write to.
- * @param flags The request's flags.
- * @param res The result of the write (for load locked/store conditionals).
- * @return Returns any fault due to the write.
- */
- template <class T>
- Fault write(T data, Addr addr, unsigned flags, uint64_t *res);
-
Fault writeBytes(uint8_t *data, unsigned size,
Addr addr, unsigned flags, uint64_t *res);
@@ -913,22 +892,6 @@
}
template<class Impl>
-template<class T>
-inline Fault
-BaseDynInst<Impl>::read(Addr addr, T &data, unsigned flags)
-{
- Fault fault = readBytes(addr, (uint8_t *)&data, sizeof(T), flags);
-
- data = TheISA::gtoh(data);
-
- if (traceData) {
- traceData->setData(data);
- }
-
- return fault;
-}
-
-template<class Impl>
Fault
BaseDynInst<Impl>::writeBytes(uint8_t *data, unsigned size,
Addr addr, unsigned flags, uint64_t *res)
@@ -968,18 +931,6 @@
}
template<class Impl>
-template<class T>
-inline Fault
-BaseDynInst<Impl>::write(T data, Addr addr, unsigned flags, uint64_t *res)
-{
- if (traceData) {
- traceData->setData(data);
- }
- data = TheISA::htog(data);
- return writeBytes((uint8_t *)&data, sizeof(T), addr, flags, res);
-}
-
-template<class Impl>
inline void
BaseDynInst<Impl>::splitRequest(RequestPtr req, RequestPtr &sreqLow,
RequestPtr &sreqHigh)
diff -r b1f3dfae06f1 -r 530ff1bc8d70 src/cpu/exec_context.hh
--- a/src/cpu/exec_context.hh Sat Jul 02 22:34:29 2011 -0700
+++ b/src/cpu/exec_context.hh Sat Jul 02 22:34:58 2011 -0700
@@ -106,19 +106,8 @@
/** Returns a pointer to the ThreadContext. */
ThreadContext *tcBase();
- /** Reads an address, creating a memory request with the given
- * flags. Stores result of read in data. */
- template <class T>
- Fault read(Addr addr, T &data, unsigned flags);
-
Fault readBytes(Addr addr, uint8_t *data, unsigned size, unsigned flags);
- /** Writes to an address, creating a memory request with the given
- * flags. Writes data to memory. For store conditionals, returns
- * the result of the store in res. */
- template <class T>
- Fault write(T data, Addr addr, unsigned flags, uint64_t *res);
-
Fault writeBytes(uint8_t *data, unsigned size,
Addr addr, unsigned flags, uint64_t *res);
diff -r b1f3dfae06f1 -r 530ff1bc8d70 src/cpu/inorder/inorder_dyn_inst.cc
--- a/src/cpu/inorder/inorder_dyn_inst.cc Sat Jul 02 22:34:29 2011 -0700
+++ b/src/cpu/inorder/inorder_dyn_inst.cc Sat Jul 02 22:34:58 2011 -0700
@@ -565,75 +565,6 @@
return cpu->read(this, addr, data, size, flags);
}
-template<class T>
-inline Fault
-InOrderDynInst::read(Addr addr, T &data, unsigned flags)
-{
- if (traceData) {
- traceData->setAddr(addr);
- traceData->setData(data);
- }
- Fault fault = readBytes(addr, (uint8_t *)&data, sizeof(T), flags);
- //@todo: the below lines should be unnecessary, timing access
- // wont have valid data right here
- DPRINTF(InOrderDynInst, "[sn:%i] (1) Received Bytes %x\n", seqNum, data);
- data = TheISA::gtoh(data);
- DPRINTF(InOrderDynInst, "[sn%:i] (2) Received Bytes %x\n", seqNum, data);
-
- if (traceData)
- traceData->setData(data);
- return fault;
-}
-
-#ifndef DOXYGEN_SHOULD_SKIP_THIS
-
-template
-Fault
-InOrderDynInst::read(Addr addr, Twin32_t &data, unsigned flags);
-
-template
-Fault
-InOrderDynInst::read(Addr addr, Twin64_t &data, unsigned flags);
-
-template
-Fault
-InOrderDynInst::read(Addr addr, uint64_t &data, unsigned flags);
-
-template
-Fault
-InOrderDynInst::read(Addr addr, uint32_t &data, unsigned flags);
-
-template
-Fault
-InOrderDynInst::read(Addr addr, uint16_t &data, unsigned flags);
-
-template
-Fault
-InOrderDynInst::read(Addr addr, uint8_t &data, unsigned flags);
-
-#endif //DOXYGEN_SHOULD_SKIP_THIS
-
-template<>
-Fault
-InOrderDynInst::read(Addr addr, double &data, unsigned flags)
-{
- return read(addr, *(uint64_t*)&data, flags);
-}
-
-template<>
-Fault
-InOrderDynInst::read(Addr addr, float &data, unsigned flags)
-{
- return read(addr, *(uint32_t*)&data, flags);
-}
-
-template<>
-Fault
-InOrderDynInst::read(Addr addr, int32_t &data, unsigned flags)
-{
- return read(addr, (uint32_t&)data, flags);
-}
-
Fault
InOrderDynInst::writeBytes(uint8_t *data, unsigned size,
Addr addr, unsigned flags, uint64_t *res)
@@ -641,73 +572,6 @@
return cpu->write(this, data, size, addr, flags, res);
}
-template<class T>
-inline Fault
-InOrderDynInst::write(T data, Addr addr, unsigned flags, uint64_t *res)
-{
- if (traceData) {
- traceData->setAddr(addr);
- traceData->setData(data);
- }
- data = TheISA::htog(data);
- return writeBytes((uint8_t*)&data, sizeof(T), addr, flags, res);
-}
-
-#ifndef DOXYGEN_SHOULD_SKIP_THIS
-
-template
-Fault
-InOrderDynInst::write(Twin32_t data, Addr addr,
- unsigned flags, uint64_t *res);
-
-template
-Fault
-InOrderDynInst::write(Twin64_t data, Addr addr,
- unsigned flags, uint64_t *res);
-template
-Fault
-InOrderDynInst::write(uint64_t data, Addr addr,
- unsigned flags, uint64_t *res);
-
-template
-Fault
-InOrderDynInst::write(uint32_t data, Addr addr,
- unsigned flags, uint64_t *res);
-
-template
-Fault
-InOrderDynInst::write(uint16_t data, Addr addr,
- unsigned flags, uint64_t *res);
-
-template
-Fault
-InOrderDynInst::write(uint8_t data, Addr addr,
- unsigned flags, uint64_t *res);
-
-#endif //DOXYGEN_SHOULD_SKIP_THIS
-
-template<>
-Fault
-InOrderDynInst::write(double data, Addr addr, unsigned flags, uint64_t *res)
-{
- return write(*(uint64_t*)&data, addr, flags, res);
-}
-
-template<>
-Fault
-InOrderDynInst::write(float data, Addr addr, unsigned flags, uint64_t *res)
-{
- return write(*(uint32_t*)&data, addr, flags, res);
-}
-
-
-template<>
-Fault
-InOrderDynInst::write(int32_t data, Addr addr, unsigned flags, uint64_t *res)
-{
- return write((uint32_t)data, addr, flags, res);
-}
-
void
InOrderDynInst::dump()
diff -r b1f3dfae06f1 -r 530ff1bc8d70 src/cpu/inorder/inorder_dyn_inst.hh
--- a/src/cpu/inorder/inorder_dyn_inst.hh Sat Jul 02 22:34:29 2011 -0700
+++ b/src/cpu/inorder/inorder_dyn_inst.hh Sat Jul 02 22:34:58 2011 -0700
@@ -612,30 +612,9 @@
// MEMORY ACCESS
//
////////////////////////////////////////////
- /**
- * Does a read to a given address.
- * @param addr The address to read.
- * @param data The read's data is written into this parameter.
- * @param flags The request's flags.
- * @return Returns any fault due to the read.
- */
- template <class T>
- Fault read(Addr addr, T &data, unsigned flags);
Fault readBytes(Addr addr, uint8_t *data, unsigned size, unsigned flags);
- /**
- * Does a write to a given address.
- * @param data The data to be written.
- * @param addr The address to write to.
- * @param flags The request's flags.
- * @param res The result of the write (for load locked/store conditionals).
- * @return Returns any fault due to the write.
- */
- template <class T>
- Fault write(T data, Addr addr, unsigned flags,
- uint64_t *res);
-
Fault writeBytes(uint8_t *data, unsigned size,
Addr addr, unsigned flags, uint64_t *res);
diff -r b1f3dfae06f1 -r 530ff1bc8d70 src/cpu/simple/atomic.cc
--- a/src/cpu/simple/atomic.cc Sat Jul 02 22:34:29 2011 -0700
+++ b/src/cpu/simple/atomic.cc Sat Jul 02 22:34:58 2011 -0700
@@ -386,72 +386,6 @@
}
-template <class T>
-Fault
-AtomicSimpleCPU::read(Addr addr, T &data, unsigned flags)
-{
- uint8_t *dataPtr = (uint8_t *)&data;
- memset(dataPtr, 0, sizeof(data));
- Fault fault = readBytes(addr, dataPtr, sizeof(data), flags);
- if (fault == NoFault) {
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