----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/1002/ -----------------------------------------------------------
Review request for Default. Summary ------- MEM: Pass the ports from Python to C++ using the Swig params This patch adds basic information about the ports in the parameter classes to be passed from the Python world to the corresponding C++ object. Currently, the only information passed is the number of connected peers, which for a Port is either 0 or 1, and for a VectorPort reflects the size of the VectorPort. The default port of the bus had to be renamed to avoid using the name "default" as a field in the parameter class. It is possible to extend the Swig'ed information further and add e.g. a pair with a description and size. Diffs ----- configs/common/FSConfig.py 03e09db82c80 src/dev/alpha/Tsunami.py 03e09db82c80 src/dev/arm/RealView.py 03e09db82c80 src/dev/x86/Pc.py 03e09db82c80 src/mem/Bus.py 03e09db82c80 src/mem/bus.cc 03e09db82c80 src/python/m5/SimObject.py 03e09db82c80 src/python/m5/params.py 03e09db82c80 Diff: http://reviews.m5sim.org/r/1002/diff Testing ------- util/regress all passing (disregarding t1000 and eio) Thanks, Andreas _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
