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(Updated June 22, 2015, 8:59 p.m.) Review request for Default. Changes ------- Refactored startupStage and resetStage. Repository: gem5 Description (updated) ------- Changeset 10866:616c230e9722 --------------------------- cpu: o3: Fetch stage updates for hw threads priority list This patch makes sure the priority_list in the fetch stage is kept in sync with suspendContext and activateContext calls. Diffs (updated) ----- src/cpu/o3/cpu.cc 9141d87c7f71099d6256b179b7819eab878cbb67 src/cpu/o3/fetch.hh 9141d87c7f71099d6256b179b7819eab878cbb67 src/cpu/o3/fetch_impl.hh 9141d87c7f71099d6256b179b7819eab878cbb67 Diff: http://reviews.gem5.org/r/2855/diff/ Testing ------- Quick regressions passed for all ISAs. Thanks, Alexandru Dutu _______________________________________________ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
