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Hmm, I think I'm still a bit confused about startupStage() and resetStage(). It seems to me that the only reason you're initializing the priority list in resetStage() is because it is called from takeOverFrom(). This call flow seems a bit counterintuitive to me, in particular calling startupStage() from resetStage() seems backwards. Wouldn't it make more sense to keep all the initialization, except for the priority list, in resetStage() and setup the priority list in takeOverFrom()? That'd make it easier to follow (I'd expect startup to call reset) what's going on here. src/cpu/o3/fetch_impl.hh (lines 363 - 364) <http://reviews.gem5.org/r/2855/#comment5649> Do you need to check the thread state when you initialize the priority list? - Andreas Sandberg On June 22, 2015, 9:59 p.m., Alexandru Dutu wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/2855/ > ----------------------------------------------------------- > > (Updated June 22, 2015, 9:59 p.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 10866:616c230e9722 > --------------------------- > cpu: o3: Fetch stage updates for hw threads priority list > This patch makes sure the priority_list in the fetch stage is kept in sync > with suspendContext and activateContext calls. > > > Diffs > ----- > > src/cpu/o3/cpu.cc 9141d87c7f71099d6256b179b7819eab878cbb67 > src/cpu/o3/fetch.hh 9141d87c7f71099d6256b179b7819eab878cbb67 > src/cpu/o3/fetch_impl.hh 9141d87c7f71099d6256b179b7819eab878cbb67 > > Diff: http://reviews.gem5.org/r/2855/diff/ > > > Testing > ------- > > Quick regressions passed for all ISAs. > > > Thanks, > > Alexandru Dutu > > _______________________________________________ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
