Regarding the other part of your email: Let me begin by saying I am a novice to both RISCV and gem5. I have a RISCV RTL with a certain config. I have set up gem5 to match that configuration. I want to make sure that they are indeed equivalent so that I can run some experiments on gem5 (instead of on RTL) since that would be faster and easier. In order to establish that equivalence, I am running a simple benchmark test on both RTL and gem5. The final numbers like DMIPS/MHz etc match fairly closely. But I want to dig further to see if the retired instruction/s at a given tick, for both these setups, are also a close match. Hence the questions.
On Wed, Mar 22, 2023 at 8:23 AM Eliot Moss <m...@cs.umass.edu> wrote: > On 3/22/2023 11:11 AM, Priyanka Ankolekar wrote: > > Sorry, I should have clarified. I am using the RISCV ISA in gem5. > > (As you could have done,) I checked the gem5 sources, > and it *does* model that register, returning totalInsts > as gem5 calculates that. Presumably that is the same as > statistics will give you, but you could read it on the > fly. Not sure if the instruction to read that is > privileged, though if it is, you could (as a hack) > change gem5 to allow it to be read in user mode. > > Cheers - EM > > PS: You did not respond to the other part of that I > said: What is it that you are really trying to do that > the previous suggestions do not satisfy? Cheers - EM >
_______________________________________________ gem5-users mailing list -- gem5-users@gem5.org To unsubscribe send an email to gem5-users-le...@gem5.org
