hi all, i used physicalmemory as the memory model for full system simulation. i first set 30ns as the memory access latency, then i set 60ns as the memory access latency. i found the missrate of running the same benchmark under these two conditions has different results. the former one(30ns) has a little larger missrate. i did understand why has different missrate.
another thing is i want to has different write/read access time of physicalmemory. so i set write request has 6X more access latency than read. however i found no difference of sim_ticks with unchanged version under the same benchmark and configurations. i know the write buffer may hide the write latency, but anyone know how to see the occupancy of write buffer and how to change the size of it? Thanks, Sheng
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