>   * This is why there are people who think that SystemC is cool
>  (bleaaaah)
SystemC has been writen to allow the flexibility VHDL does not provide. It
also have some advantages and drawbacks.

You can for instance inherit all the types to add a tag, index etc... Then
for an FFT you can easily verify the design as you get the result of the
permutation data. Same remark for serial and/or pipelined calculation. Also
SystemC provide the resolver overwriting. In VHDL you can say a 1 wins on a
L ( that is usefull for open collector outputs ) but not more etc... etc...

SystemC may not be the future, but at least it would have replace all the
companies propitiatory similar solutions.

>   * This is why people say that VHDL is "slow" :-(

>   * This is why it takes so long and so many efforts to make
>       something (a model ?) even a bit complex directly in VHDL
> 
>  I'm really curious to know what will come out of this thread.
> 



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