On 20/07/11 7:52 AM, Svenn Are Bjerkem wrote: > Hi, > > I am running a ghdl simulation of mc8051 and want to do some profiling > by using textio to write the program counter to file. I have found by > searching google that it is not possible to do this since the program > counter is a couple of levels down in the hierarchy. I have so far > used gtkwave on the ghw file and exported to vcd and used vcd2txt to > get something I can use awk on. Problem is only that the PC shows up > both on positive and negative edge of the clock, hence the wish to use > textio to only print on rising clk edge. Ok, that's the background, > now the question: How do I do this with vpi? I have not tried vpi > before, and the examples did not make it crystal clear to me how to > proceed. > > I can, of course, add some buses up to top level and then achieve my > goal, but if vpi can save me from modifying the design, it would be a > better solution. >
I haven't done anything with VPI in more than a decade, and then in Verilog. The example for VPI (item 9. found on the GHDL Features page http://ghdl.free.fr/site/pmwiki.php?n=Main.Features vpi-ex-ghdl.tar http://ghdl.free.fr/site/uploads/Main/vpi-ex-ghdl.tar needs a little context as does perhaps VPI. VPI is discussed in various books and standards, 'Verilog HDL A Guide to Digital Design and Synthesis' by Samir Palnitkar the section 'Programming Language Interface' as does IEEE Std 1364-1995/2001/2005, the section 'Using VPI routines' (1995) or similar. There's also a section on VPI routine definitions. There's also the Icarus Verilog Using VPI wiki page http://iverilog.wikia.com/wiki/Using_VPI which demonstrates the share library object mechanism shown in the Makefile for the above example. Otherwise Google is your friend. What you do is find some number of signals in the design hierarchy, create one or more call backs to invoke your own routine(s) when the signals transact and in your case print something out after doing a little filtering perhaps. The VPI routines shown in the example vpi1 and vpi2 shared library files are a subset but are likely adequate for your purposes. I'd imagine you'd need to do a little filter that would be closely analogous to what you'd do on the ghw file dump, which contains all the information anyway and it would be easier to filter the ghw file from where you are today. Passing on VPI or a ghw filter if you were to allow modification of the design model you could use an assertion statement. The example appears to be licensed under GPLv2, the vpi_user.h is from iverilog and the example author appears to be Felix Bertram who did eng-osx on SourceForge as well as the grt hooks for the vpi routines. The license may or may not throw a monkey wrench in your use of a derivative. The examples compiled under 10.4 kubuntu and runs with ghdl 0.29. I'd need to do a bit of remedial reading myself to modify one of vpi1.c or vpi2.c for your purpose after so long and if it were me would as soon filter the ghw file. That you were pulling PC values out of the ghw file already says you were most of the way there already. Filtering with any probing method could probably benefit from a machine cycle combinatorial marker for pure profiling. Immediate value addresses may not be of real interest for example. There's some interest in doing something PLI'ish in VHDL-20XX, but without some simulation controls thrown in it would be kind of hollow. Gathering information for profiling really doesn't do the idea of PLI justice. We get some diversity in the responses don't we? _______________________________________________ Ghdl-discuss mailing list [email protected] https://mail.gna.org/listinfo/ghdl-discuss
