Hi, > some news. This is still work in progress, but currently: > > $ time ./tb > ... > > INFO clock cycle 7302 > INFO clock cycle 7303 > INFO Output nb 149 at cycle 7304 (check OK) Obtained > 00000000000000000000000000111010 > INFO Last output vector read at cycle 7304 > tb.vhd:305:48:@73045ns:(report note): INFO Stopping simulation. > INFO clock cycle 7304 > INFO clock cycle 7305 > INFO clock cycle 7306 > INFO clock cycle 7307 > > real 0m4.980s > user 0m4.901s > sys 0m0.068s > > > There was indeed room for improvement.
I could recompile ghdl from source and launch the simulation again. There is indeed a huge speedup now! It also seems the analysis/build steps are now much faster, is it true? (I tested on only one design so I'm not sure) If it is, then this is also a very much appreciated improvement! Thanks! Adrien _______________________________________________ Ghdl-discuss mailing list [email protected] https://mail.gna.org/listinfo/ghdl-discuss
