Hello,
I got an error message that says handling of floating point literals in physical literals is not supported. I can change my code, because it’s just a ‘100.0 MHz’ constant. Is this a features that will be implemented in the future? If I remember correctly, VHDL allows floating point literals in physical literal definitions. Here is the complete error log: =================================================================================== ERROR while executing ghdl: D:\git\SATAController\lib\PoC\tb\misc\misc_Noise_tb.vhdl Return Code: 2 -------------------------------------------------------------------------------- build_constant: cannot handle IIR_KIND_PHYSICAL_FP_LITERAL (D:\git\SATAController\lib\PoC\tb\misc\misc_Noise_tb.vhdl:17:115) ******************** GHDL Bug occured **************************** Please report this bug on http://gna.org/projects/ghdl GHDL release: GHDL 0.33dev (20141104) [Dunoon edition] Compiled with GNAT Version: GPL 2014 (20140331) In directory: D:\git\SATAController\lib\PoC\temp\ghdl\ Command line: C:\Tools\GHDL\0.33dev\bin\ghdl.exe -a -P. --syn-binding --std=93 --work=test D:\git\SATAController\lib\PoC\tb\misc\misc_Noise_tb.vhdl Exception TYPES.INTERNAL_ERROR raised Exception information: Exception name: TYPES.INTERNAL_ERROR Message: errorout.adb:63 ****************************************************************** Code snippets to reproduce the message: =================================================================================== package physical is type FREQ is range 0 to INTEGER'high units Hz; kHz = 1000 Hz; MHz = 1000 kHz; GHz = 1000 MHz; -- THz = 1000 GHz; end units; end package; library PoC; use PoC.physical.all; entity misc_Noise_tb is end; architecture test of misc_Noise_tb is constant CLOCK_FREQ : FREQ := 100.0 MHz; begin -- empty end architecture; =================================================================================== Regards Patrick ----------------------------------- Wissenschaftliche Hilfskraft Technische Universität Dresden Fakultät Informatik Institut für Technische Informatik Lehrstuhl VLSI-Entwurfssysteme, Diagnostik und Architektur 01062 Dresden Tel.: +49 351 463-38451 Fax: +49 351 463-38324 Raum: APB-1020 E-Mail: <mailto:[email protected]> [email protected] WWW: <http://vlsi-eda.inf.tu-dresden.de/> http://vlsi-eda.inf.tu-dresden.de
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