Hi, I was able to import the library correctly. The correct commands are: % mkdir unisim % ghdl -i --work=unisim unisim_src/*.vhd
When I was trying to import the libraries for primitives on the FPGA. I got an error that 'std_logic_arith' can't be found in library 'ieee'. I used the solution in: http://stackoverflow.com/questions/25837237/is-the-vhdl-package-ieee-std-logic-arith-shipped-with-ghdl. But then, received the error that: - primitive/AFIFO36_INTERNAL.vhd:1391:22: no declaration for "conv_std_logic_vector" When I attempted to compile the libraries provided by Xilinx in their CAD tool,I get many errors, which I'll need to fix. Also, is there a manner for a faster recompile of ghdl. When I make changes to ghdl, and use the build script, It takes a significant amount of time to compile the tool. Is there any flags or settings that I can turn on to increase the speed of the recompile? On another note, I do believe for my end goal, which was mentioned in my previous email, that I do not necessarily need all the libraries from the FPGA vendor. Ultimately, I would like to know how/where I can gain access to the AST to make the modification I need to the vhdl file and output an equivalent vhdl file with my modifications? I am new with ghdl and I am still learning. Thank you once again, On Fri, Jul 10, 2015 at 7:31 PM, Vincent Mirian <[email protected]> wrote: > Hi Tristan, > > Thank you for your reply. > > Through the link you provided, I was able to get the instruction to build > and install ghdl. > > I played with ghdl a little bit, however I do have the '--reprint' command > as an option. So I was unable to play with its functionality. I am looking > for hooks on where I can insert my code to the tool, however I am lacking > knowledge on the flow of the tool. Perhaps some clarity on the flow would > help. > > Also, I am using ghdl for Xilinx FPGAs, which have other > libraries/packages for their devices. I would need to add these libraries > to the tool for the vhdl to compile. Note that I have tried to use the > import command to import these libraries into a directory that I would use > for analysis, however it did not seem to function. I used the following > steps, at command prompt: > 1- % mkdir lib > 2- % ghdl -i --workdir=lib/ *.vhd ./primitive/*.vhd > 3- % ghdl -a --work=lib/ fct_sim.vhd > > At this point, I got the following error msg: " ghdl: bad character in > identifier" > > Then, I repeated steps 1 and 2, and for step three I did: > % ghdl -a fct_sim.vhd > and I got the following error: "fct_sim.vhd:38:9: cannot find resource > library "unisim" > fct_sim.vhd:39:12: primary unit "vcomponents" not found in library > "unisim"" > > Can anyone provide some clarity on the flow of GHDL, and show me the steps > to add the Xilinx libraries to the tool? > > Also, I read that LLVM can be used with GHDL. Would it make my goal easier > if I incorporate LLVm with GHDL? My original goal is to replace component > in a vhdl with other functions, and analyse the connectivity of the > components. > > Thank you once again, I apologize for the length of this email. > > Thank you, > > On Fri, Jul 10, 2015 at 3:08 AM, <[email protected]> wrote: > >> Hello, >> >> > My goal is to read a VHDL file and translate component declarations >> > of a certain type into plain assignments. I would also like to >> > analyse the connectivity of these components and perform operations >> > on these components depending on the connectivity between the >> > components. I can achieve my goal with an AST, which I assume is >> > generated in GHDL. My first question is: can GHDL help me achieve my >> > goal? If so, can someone provide some references or steps on how to >> > achieve this? Or is there a better approach or tool that can help me >> > achieve my goal? >> >> Yes, GHDL can help you. >> GHDL indeed creates an AST which is described in the file iirs.ads >> It is also able to print VHDL code from the AST (using disp_vhdl). >> >> So there are two possible implementations: >> * write your transformation using the internal AST. You can inspire >> from the --reprint command (implemented in ghdlprint.adb) that just >> parse and analyze VHDL code and print it from the AST. >> >> * Or generate an XML (or yaml or whatever) representation of the AST, >> and do the transformation on that output. Should be simpler, more >> generic but you need to carefully define the XML scheme. >> >> > I downloaded the source from the svn repository, and I was unable to >> > compile the tool. >> >> Where did you get the svn url ? Please tell me as this is not up to >> date. The current repository is on SF: >> http://sourceforge.net/projects/ghdl-updates/ >> >> > I found some instruction in the README file in the >> > translate folder, however I had no success. I am running Ubuntu >> > 12.04 64 bit with an Intel ISA (i5). I have gcc 4.6.3 installed. >> > Please let me know how to compile the tool. >> >> Check the new instructions in the README. The simplest way for >> you is to download the GNAT Ada compiler for i386 (even if you use >> a x86-64 kernel). >> >> > Also, an explanation on >> > the directory hierarchy would be great. >> >> The core of the compiler is in src/vhdl. >> >> > I assume the translate >> > folder is where the majority of the code resides, >> >> Not really. The translate directory contains the pass that >> generate code from the AST, which is of no interest to you. >> >> > since the other >> > folders contain ads and adb that seem to be vhdl libraries. >> >> No, ads and adb files are Ada files. >> >> > Nonetheless, your help would be appreciated to clarify the >> > structure. >> >> Do not hesitate to ask questions! >> >> Tristan. >> >> _______________________________________________ >> Ghdl-discuss mailing list >> [email protected] >> https://mail.gna.org/listinfo/ghdl-discuss >> > > > > -- > Vincent Mirian > PhD Candidate > Electrical and Computer Engineering > University of Toronto > > Eco-Tip: Save trees! Do you really need to print this email? ;-) > -- Vincent Mirian PhD Candidate Electrical and Computer Engineering University of Toronto Eco-Tip: Save trees! Do you really need to print this email? ;-)
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