Hello Adrien, I'm one of the developers of the PoC-Library. => https://github.com/VLSI-EDA/PoC This library comes with a set of testbenches and some Python tools to abstract the simulation runs for different simulators.
Currently we support:
- iSim (14.7)
- xSim (2014.x/2015.x)
- GHDL (+GTKwave as viewer) and
- vSim (QuestaSim - tested with 10.2c)
I used PoC's simple "arith_prefix_and" module from
"src/arith/arith_prefix_and.vhdl". It builds a carry-chain based AND gate.
The implementation used Xilinx's XORCY and MUXCY primitives.
arith_prefix_and: Number of input bits = 8:
iSim: 3.7574 sec
xSim: 3.1700 sec
vSim: 3.3036 sec
ghdl: 1.0233 sec
A second more expensive example is a wide-adder (arith_addw.vhdl). This adder
is designed for wide inputs. The testbench
uses only a few bits to reduce runtime.
arith_addw: Number of input bits = 9
iSim: 92.7182 sec
ghdl: 71.2711 sec
vSim: 38.4598 sec
xSim: 27.4511 sec
So in my opinion: Yes, ghdl is mostly faster than iSim and xSim. Especially the
compiling part is much faster. While iSim/xSim and vSim search the
files and check them, ghdl is already simulating :).
Regards
Patrick
-----------------------------------
Wissenschaftliche Hilfskraft
Technische Universität Dresden
Fakultät Informatik
Institut für Technische Informatik
Lehrstuhl VLSI-Entwurfssysteme, Diagnostik und Architektur
01062 Dresden
Tel.: +49 351 463-38451
Fax: +49 351 463-38324
Raum: APB-1020
E-Mail: [email protected]
WWW: http://vlsi-eda.inf.tu-dresden.de
-----Original Message-----
From: Ghdl-discuss [mailto:[email protected]] On Behalf Of Adrien
Prost-Boucle
Sent: Thursday, August 06, 2015 8:26 PM
To: GHDL discuss list <[email protected]>
Subject: [Ghdl-discuss] Simulation speed compared to ISim, XSim: GHDL shines
Hi everybody,
I've launched simulation of more than 12 (personal) VHDL designs, with GHDL,
Xilinx's ISim from ISE Design Suite 2013.1 (full) and with Xilinx's XSim from
Vivado Design Suite 2015.1 (full).
My initial goal was to find how much slower GHDL was compared to these
commercial simulators.
Note: I compiled GHDL against gcc 4.9 with isl, cloog, lto. Not tested without.
My PC is 64 bits ArchLinux.
I got a very nice surprise: all simulations were at least 2 times faster,
sometimes 4 times faster, than ISim and XSim.
For a design with an extreme density of generate statements, with even some
recursive component instantiation, XSim did spend 10-15 minutes analyzing the
"data flow" during elaboration. The generated simulator did the simulation in
~8 minutes.
That design was elaborated in 20 seconds by GHDL, and the simulation took only
3 minutes :-)
The only step done slower by GHDL is analysis, because it is not multithreaded.
But that has a rather low importance.
Anybody can do some comparison with Altera tool or Modelsim?
Regards,
Adrien
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