**\[WARNING: Work in progress\]** Add SystemVerilog support, which was relatively easy since both ctags and the lexer support it.
**Done:** * [x] Create SystemVerilog filetype (with all the SystemVerilog keywords) * [x] Add filetype to Geany source code (create GEANY_FILETYPES_SYSVERILOG et al, create tag map in tm_parser.c, etc) * [x] Compile and test it **TO DO:** * [ ] Select which of the tag categories parsed by ctags to process in Geany * [ ] Provide meaningful tag associations (tm_tag_\*_t) in tm_parser.c * [ ] Arrange into groups and provide meaningful icons You can view, comment on, or merge this pull request online at: https://github.com/geany/geany/pull/4039 -- Commit Summary -- * Add SystemVerilog filetype * !TODO! (WIP) SystemVerilog: provide appropriate Ctags -- File Changes -- A data/filedefs/filetypes.systemverilog (62) M data/filetype_extensions.conf (3) M src/filetypes.c (1) M src/filetypes.h (1) M src/highlighting.c (2) M src/highlightingmappings.h (7) M src/tagmanager/tm_parser.c (60) M src/tagmanager/tm_parser.h (1) M src/tagmanager/tm_parsers.h (1) -- Patch Links -- https://github.com/geany/geany/pull/4039.patch https://github.com/geany/geany/pull/4039.diff -- Reply to this email directly or view it on GitHub: https://github.com/geany/geany/pull/4039 You are receiving this because you are subscribed to this thread. Message ID: <geany/geany/pull/[email protected]>
