Sorry it took some time to boot board with Linux. Not sure how to determine
correct Device ID, Vendor ID seems to be all 8086 on the oard  My lspci -nn
command output is

root@localhost:~# lspci -nn
00:00.0 Host bridge [0600]: Intel Corporation Device [8086:5af0] (rev 0b)
00:00.1 Signal processing controller [1180]: Intel Corporation Device
[8086:5a8c] (rev 0b)
00:02.0 VGA compatible controller [0300]: Intel Corporation Device
[8086:5a84] (rev 0b)
00:0e.0 Audio device [0403]: Intel Corporation Device [8086:5a98] (rev 0b)
00:0f.0 Communication controller [0780]: Intel Corporation Device
[8086:5a9a] (rev 0b)
00:11.0 Unclassified device [0050]: Intel Corporation Device [8086:5aa2]
(rev 0b)
00:12.0 SATA controller [0106]: Intel Corporation Device [8086:5ae3] (rev
0b)
00:13.0 PCI bridge [0604]: Intel Corporation Device [8086:5ad8] (rev fb)
00:13.2 PCI bridge [0604]: Intel Corporation Device [8086:5ada] (rev fb)
00:13.3 PCI bridge [0604]: Intel Corporation Device [8086:5adb] (rev fb)
00:14.0 PCI bridge [0604]: Intel Corporation Device [8086:5ad6] (rev fb)
00:14.1 PCI bridge [0604]: Intel Corporation Device [8086:5ad7] (rev fb)
00:15.0 USB controller [0c03]: Intel Corporation Device [8086:5aa8] (rev 0b)
00:15.1 USB controller [0c03]: Intel Corporation Device [8086:5aaa] (rev 0b)
00:16.0 Signal processing controller [1180]: Intel Corporation Device
[8086:5aac] (rev 0b)
00:16.1 Signal processing controller [1180]: Intel Corporation Device
[8086:5aae] (rev 0b)
00:16.2 Signal processing controller [1180]: Intel Corporation Device
[8086:5ab0] (rev 0b)
00:16.3 Signal processing controller [1180]: Intel Corporation Device
[8086:5ab2] (rev 0b)
00:17.0 Signal processing controller [1180]: Intel Corporation Device
[8086:5ab4] (rev 0b)
00:17.1 Signal processing controller [1180]: Intel Corporation Device
[8086:5ab6] (rev 0b)
00:17.2 Signal processing controller [1180]: Intel Corporation Device
[8086:5ab8] (rev 0b)
00:17.3 Signal processing controller [1180]: Intel Corporation Device
[8086:5aba] (rev 0b)
00:18.0 Signal processing controller [1180]: Intel Corporation Device
[8086:5abc] (rev 0b)
00:18.1 Signal processing controller [1180]: Intel Corporation Device
[8086:5abe] (rev 0b)
00:18.2 Signal processing controller [1180]: Intel Corporation Device
[8086:5ac0] (rev 0b)
00:18.3 Signal processing controller [1180]: Intel Corporation Device
[8086:5aee] (rev 0b)
00:19.0 Signal processing controller [1180]: Intel Corporation Device
[8086:5ac2] (rev 0b)
00:19.1 Signal processing controller [1180]: Intel Corporation Device
[8086:5ac4] (rev 0b)
00:19.2 Signal processing controller [1180]: Intel Corporation Device
[8086:5ac6] (rev 0b)
00:1b.0 SD Host controller [0805]: Intel Corporation Device [8086:5aca]
(rev 0b)
00:1c.0 SD Host controller [0805]: Intel Corporation Device [8086:5acc]
(rev 0b)
00:1e.0 SD Host controller [0805]: Intel Corporation Device [8086:5ad0]
(rev 0b)
00:1f.0 ISA bridge [0601]: Intel Corporation Device [8086:5ae8] (rev 0b)
00:1f.1 SMBus [0c05]: Intel Corporation Device [8086:5ad4] (rev 0b)
02:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network
Connection [8086:157b] (rev 03)
root@localhost:~#

In coreboot it initializes as

uintptr_t uart_platform_base(int idx)
{
u8      *pcie;
u32      tmp;
idx  = idx & 3;
pcie = (u8 *)PCIE_MMIO(0, PCH_DEV_SLOT_UART, idx, 0);
tmp  = read32 (pcie + PCI_BASE_ADDRESS_0);
if (tmp == 0xFFFFFFFF) {
/* the device might be hidden */
return LPSS_UART_BASE_ADDRESS;
} else {
return (uintptr_t) (tmp & 0xFFFFFFF0);
}
}

#define PCIE_MMIO(Bus, Device, Function, Register ) \
          ( (UINTN)CONFIG_MMCONF_BASE_ADDRESS + \
            (UINTN)(Bus << 20) + \
            (UINTN)(Device << 15) + \
            (UINTN)(Function << 12) + \
            (UINTN)(Register) \
          )


#define PCH_DEV_SLOT_UART 0x18

There are 4 uarts (idx 0 to 3)

Is above information sufficient to find the required information?

On Wed, Mar 1, 2017 at 4:34 PM, Gailu Singh <gail...@gmail.com> wrote:

> Build problem was due to not running ./configure. I only did make clean
> and make. Build issue  is now resolved after running configure. Only
> cosmetic change in your patch.
>
> =============
> static void
> read_bars(grub_pci_device_t dev, struct grub_serial_board *board)
> {
>   for (unsigned bar = 0; bar < NUM_BARS; ++bar)
>
> changed to
> =============
> static void
> read_bars(grub_pci_device_t dev, struct grub_serial_board *board)
> {
>   unsigned bar;
>
>   for (bar = 0; bar < NUM_BARS; ++bar)
> ============
>
> I was getting error for C99 enforcement error during build(‘for’ loop
> initial declarations are only allowed in C99 mode)
>
>
> I will check PCI vendor ID and Device ID and get back to you.
>
>
>
> On Wed, Mar 1, 2017 at 4:27 PM, Matthias Lange <
> matthias.la...@kernkonzept.com> wrote:
>
>> On 03/01/2017 11:32 AM, Gailu Singh wrote:
>> > I checked coreboot where in the memory it is mapped and it seems to be
>> > on PCIE. Relevant code from coreboot. So I am hopeful that patch will
>> work.
>> > ---------
>> > uintptr_t uart_platform_base(int idx)
>> > {
>> > u8      *pcie;
>> > u32      tmp;
>> > idx  = idx & 3;
>> > pcie = (u8 *)PCIE_MMIO(0, PCH_DEV_SLOT_UART, idx, 0);
>> > tmp  = read32 (pcie + PCI_BASE_ADDRESS_0);
>> > if (tmp == 0xFFFFFFFF) {
>> > /* the device might be hidden */
>> > return LPSS_UART_BASE_ADDRESS;
>> > } else {
>> > return (uintptr_t) (tmp & 0xFFFFFFF0);
>> > }
>> > }
>> > ---------
>>
>> This looks promising. Could you extract the PCI vendor and device ID
>> please? My current implementation currently only supports OXSemi chips.
>>
>> >  I applied the patches and run make clean followed by make but build
>> > failed as follows
>> > ------------------------
>> > cat syminfo.lst | sort | gawk -f ./genmoddep.awk > moddep.lst || (rm -f
>> > moddep.lst; exit 1)
>> > grub_ns8250_pci_mmio_init in serial is not defined
>> > make[3]: *** [moddep.lst] Error 1
>> > ------------------------
>>
>> Hmmm, grub_ns8250_pci_mmio_init is defined in include/grub/serial.h.
>> Could you check that please? I failed to reproduce your problem, maybe I
>> did something different?
>>
>> (master checked out)
>> /tmp/grub $ /path/to/grub-src/configure --with-platform=efi
>> /tmp/grub $ make -j12 # success
>> (applied my three patches)
>> /tmp/grub $ make clean
>> /tmp/grub $ make -j12 # success
>>
>> Matthias.
>>
>> > On Wed, Mar 1, 2017 at 3:27 PM, Gailu Singh <gail...@gmail.com
>> > <mailto:gail...@gmail.com>> wrote:
>> >
>> >     Sorry for typo. I meant 8250 instead of 8050 in last email
>> >
>> >     On Wed, Mar 1, 2017 at 3:21 PM, Gailu Singh <gail...@gmail.com
>> >     <mailto:gail...@gmail.com>> wrote:
>> >
>> >         My board is Intel Oxbohill CRB (Apollo lake). On my board UART
>> >         are not connected to PCI.
>> >
>> >         I am using grub2 payload loaded by coreboot. UART works fine in
>> >         coreboot by using memory mapped 8050 driver
>> >         (https://github.com/coreboot/coreboot/blob/master/src/drive
>> rs/uart/uart8250mem.c
>> >         <https://github.com/coreboot/coreboot/blob/master/src/drive
>> rs/uart/uart8250mem.c>),
>> >         however when grub2 is loaded it refuses to recognize UART.
>> >
>> >
>> >
>> >         On Wed, Mar 1, 2017 at 3:08 PM, Matthias Lange
>> >         <matthias.la...@kernkonzept.com
>> >         <mailto:matthias.la...@kernkonzept.com>> wrote:
>> >
>> >             Hi,
>> >
>> >             On 03/01/2017 08:00 AM, Andrei Borzenkov wrote:
>> >             > please test patches from Matthias Lange
>> >             >
>> >             > https://lists.gnu.org/archive/
>> html/grub-devel/2017-02/msg00104.html
>> >             <https://lists.gnu.org/archive/html/grub-devel/2017-02/
>> msg00104.html>
>> >             >
>> >             >
>> >             > On Wed, Mar 1, 2017 at 9:15 AM, Gailu Singh <
>> gail...@gmail.com <mailto:gail...@gmail.com>> wrote:
>> >             >> Hi Experts,
>> >             >>
>> >             >> I am using GRUB2 on intel apollo lake board. This board
>> does not have IO
>> >             >> mapped uart instead it has 8250 memory mapped UART.
>> >
>> >             Could you share some details about the board?
>> >
>> >             >> GRUB2 does not recognize memory mapped uart and gives
>> error ("serial port
>> >             >> COM0 not found). There is a 8250 memory mapped driver
>> available in coreboot.
>> >             >> Is it possible to port that driver to Grub2?
>> >
>> >             My patch set adds support for 8250 MMIO PCI cards. Is the
>> >             UART on your
>> >             board connected via PCI?
>> >
>> >             Best,
>> >             Matthias.
>>
>
>
_______________________________________________
Grub-devel mailing list
Grub-devel@gnu.org
https://lists.gnu.org/mailman/listinfo/grub-devel

Reply via email to