On 19 Sep 2005, at 17:48:130, Greg Sevart wrote:
Yes, the PII without on-die or integrated cache suffered from an
even smaller bus width and frequency to cache than the on-die but
not integrated cache did. With process sizes as big as they were
(450 and 350nm), it wasn't economical to put large amounts of cache
in the processor die. However, with 250nm and smaller processes,
the die size was shrunk enough to make it economically viable. If
the die is reasonable, it is certainly a lot cheaper to integrated
it into the core than to make a processor 'package' a la Slot 1.
The PII was a definite step backwards with regard to the PPro.
However, it was necessary to keep processor costs down. As I'm sure
you recall, the PPro was marketed soley as a server chip. However,
the PII was for desktops and workstations, and therefore had to fit
in price points less than that of the PPro. With the gigantic die
size of the PPro at that time, it simply wasn't possible.
Ideally, Intel would have continued the PPro, and gave it a
350/250nm process shrink and maintained it as the server line, but
clearly they didn't. :)
Well, there was the... 333Mhz? Pentium Pro Overdrive, which IIRC was
a P2 with 256KB of fullspeed cache in the package. :p
-JB
