On Sun, 24 Oct 2021 08:55:00 -0400, Peter Relson wrote:
> ...
>That post omitted this phrase from the PoP that follows shortly after:
>
>For CPU table entries that are addressed by real or absolute addresses, it
>is unpredictable
>whether the address wraps or an addressing exception is recognized.
>
Does "unpredictable whether the address wraps" imply that in AMODE 31
the sign bit might be set to 1, or that in AMODE 24 the leftmost octet
might be set other than to x'00'?
>Paul G wrote:
><snip>
>An interrupt condition is *never* recognized "during generation of [an]
>address."
></snip>
>
>Therefore we conclude that this statement is not correct for the case of
>CPU table entries addressed by real or absolute addresses.
>
From the descrription of LOAD ADDRESS in the PoOps:
Program Exceptions:
• Operation (L A Y if the long-displacement facility is not installed)
(no exceptions are mentioned for LA.)
I stand by my assertion:
On Sat, 23 Oct 2021 20:32:41 -0500, Paul Gilmartin wrote:
> ...
>An exception is *never* recognized on an LA instruction, even though wraparound
>might occur or the value before truncation exceeds 24, 32, or 64 bits.
>(I don't know exactly what a "CPU table entry" is in this context.)
>
I readily suspect that the writer knew no better than you and merely
supplied the output off a Travesty Generator.
<https://en.wikipedia.org/wiki/Travesty>
-- gil
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