On 1/13/2019 8:47 PM, David Crayford wrote:
IIRC, the interleaved instruction scheduling was to mitigate the AGI problem?
Yes. The AGI "problem" is still there, but with an OOO machine you can avoid it simply by using different registers rather than by completely reordering your code.
In my experienced the two optimizations that make the most difference are function inlining and loop unrolling. I've taken to defining functions in header files to take advantage of both (we don't use IPA).
Yes. both are important. In HLASM one would use a macro to inline a function. Manual loop unrolling is something we do only in the performance path.
I've noticed (depending on compiler options) the C optimizer is starting to use vector instructions. They can be a bit hairy even for experienced assembler programmers. Best to leave that to a compiler IMO.
Haha! We were part of the z13s ESP and we started using vector instructions in our HLASM programs even before the machine was GA! We use them for all kinds of primitives including string FIND, bitmap manipulation, and other equally-simple, but important, stuff. Those "vectorized" routines perform literally orders of magnitude faster than their non-vector counterparts! Using them instead of SRST, we were able reduce the total CPU used by an (E)JES FIND across a multi-million line SPOOLed report by something in the neighborhood of 23%! (And if you can imagine all of the other work being done -- such as calling numerous routines, stack manipulation, reading and deblocking of SPOOL records, etc. -- 23% is a HUGE amount!!!)
Sadly, I've tried to convince the assembler programmers on ASSEMBLER-LIST that vector instructions are useful for such purposes, but have been met with a surprising level of skepticism (despite my real-world experience and glowing endorsement) -- primarily due to flawed interpretation of what they've read in PoOp rather than just trying it out and seeing for themselves. Oh well... LOL
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