Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PALETTE register macro.
Signed-off-by: Jani Nikula <jani.nik...@intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 29 ++++++++++++++--------
drivers/gpu/drm/i915/i915_reg.h | 2 +-
2 files changed, 20 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm/i915/display/intel_color.c
index ca7112b32cb3..edb805fc9c97 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1227,7 +1227,7 @@ static void i9xx_load_lut_8(struct intel_crtc *crtc,
lut = blob->data;
for (i = 0; i < 256; i++)
- intel_de_write_fw(dev_priv, PALETTE(pipe, i),
+ intel_de_write_fw(dev_priv, PALETTE(dev_priv, pipe, i),
i9xx_lut_8(&lut[i]));
}
@@ -1240,9 +1240,11 @@ static void i9xx_load_lut_10(struct intel_crtc *crtc,
enum pipe pipe = crtc->pipe;
for (i = 0; i < lut_size - 1; i++) {
- intel_de_write_fw(dev_priv, PALETTE(pipe, 2 * i + 0),
+ intel_de_write_fw(dev_priv,
+ PALETTE(dev_priv, pipe, 2 * i + 0),
i9xx_lut_10_ldw(&lut[i]));
- intel_de_write_fw(dev_priv, PALETTE(pipe, 2 * i + 1),
+ intel_de_write_fw(dev_priv,
+ PALETTE(dev_priv, pipe, 2 * i + 1),
i9xx_lut_10_udw(&lut[i]));
}
}
@@ -1274,9 +1276,11 @@ static void i965_load_lut_10p6(struct intel_crtc *crtc,
enum pipe pipe = crtc->pipe;
for (i = 0; i < lut_size - 1; i++) {
- intel_de_write_fw(dev_priv, PALETTE(pipe, 2 * i + 0),
+ intel_de_write_fw(dev_priv,
+ PALETTE(dev_priv, pipe, 2 * i + 0),
i965_lut_10p6_ldw(&lut[i]));
- intel_de_write_fw(dev_priv, PALETTE(pipe, 2 * i + 1),
+ intel_de_write_fw(dev_priv,
+ PALETTE(dev_priv, pipe, 2 * i + 1),
i965_lut_10p6_udw(&lut[i]));
}
@@ -3150,7 +3154,8 @@ static struct drm_property_blob *i9xx_read_lut_8(struct
intel_crtc *crtc)
lut = blob->data;
for (i = 0; i < LEGACY_LUT_LENGTH; i++) {
- u32 val = intel_de_read_fw(dev_priv, PALETTE(pipe, i));
+ u32 val = intel_de_read_fw(dev_priv,
+ PALETTE(dev_priv, pipe, i));
i9xx_lut_8_pack(&lut[i], val);
}
@@ -3176,8 +3181,10 @@ static struct drm_property_blob *i9xx_read_lut_10(struct
intel_crtc *crtc)
lut = blob->data;
for (i = 0; i < lut_size - 1; i++) {
- ldw = intel_de_read_fw(dev_priv, PALETTE(pipe, 2 * i + 0));
- udw = intel_de_read_fw(dev_priv, PALETTE(pipe, 2 * i + 1));
+ ldw = intel_de_read_fw(dev_priv,
+ PALETTE(dev_priv, pipe, 2 * i + 0));
+ udw = intel_de_read_fw(dev_priv,
+ PALETTE(dev_priv, pipe, 2 * i + 1));
i9xx_lut_10_pack(&lut[i], ldw, udw);
}
@@ -3224,8 +3231,10 @@ static struct drm_property_blob
*i965_read_lut_10p6(struct intel_crtc *crtc)
lut = blob->data;
for (i = 0; i < lut_size - 1; i++) {
- u32 ldw = intel_de_read_fw(dev_priv, PALETTE(pipe, 2 * i + 0));
- u32 udw = intel_de_read_fw(dev_priv, PALETTE(pipe, 2 * i + 1));
+ u32 ldw = intel_de_read_fw(dev_priv,
+ PALETTE(dev_priv, pipe, 2 * i + 0));
+ u32 udw = intel_de_read_fw(dev_priv,
+ PALETTE(dev_priv, pipe, 2 * i + 1));
i965_lut_10p6_pack(&lut[i], ldw, udw);
}
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 744698a9c107..5c07b489073d 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1480,7 +1480,7 @@
#define PALETTE_10BIT_BLUE_EXP_MASK REG_GENMASK(7, 6)
#define PALETTE_10BIT_BLUE_MANT_MASK REG_GENMASK(5, 2)
#define PALETTE_10BIT_BLUE_UDW_MASK REG_GENMASK(1, 0)
-#define PALETTE(pipe, i) _MMIO(DISPLAY_MMIO_BASE(dev_priv) +
\
+#define PALETTE(dev_priv, pipe, i) _MMIO(DISPLAY_MMIO_BASE(dev_priv) +
\
_PICK_EVEN_2RANGES(pipe, 2,
\
_PALETTE_A, _PALETTE_B,
\
_CHV_PALETTE_C,
_CHV_PALETTE_C) + \
--
2.39.2
