Program context latency for delayed vblank timings to create window2.
Signed-off-by: Animesh Manna <[email protected]>
---
drivers/gpu/drm/i915/display/intel_cmtg.c | 4 ++++
drivers/gpu/drm/i915/display/intel_cmtg_regs.h | 2 ++
2 files changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_cmtg.c
b/drivers/gpu/drm/i915/display/intel_cmtg.c
index 3dfb691913cb..6086ba4d764f 100644
--- a/drivers/gpu/drm/i915/display/intel_cmtg.c
+++ b/drivers/gpu/drm/i915/display/intel_cmtg.c
@@ -249,6 +249,7 @@ static void intel_cmtg_set_timings(const struct
intel_crtc_state *crtc_state)
void intel_cmtg_enable(const struct intel_crtc_state *crtc_state)
{
+ struct intel_display *display = to_intel_display(crtc_state);
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
if (cpu_transcoder != TRANSCODER_A && cpu_transcoder != TRANSCODER_B)
@@ -257,4 +258,7 @@ void intel_cmtg_enable(const struct intel_crtc_state
*crtc_state)
/* Program CMTG Transcoder Timings */
intel_cmtg_set_timings(crtc_state);
+ /* Program context latency */
+ intel_de_write(display, TRANS_SET_CTX_LATENCY_CMTG(cpu_transcoder),
+ intel_de_read(display,
TRANS_SET_CONTEXT_LATENCY(display, cpu_transcoder)));
}
diff --git a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
index 37dee7165852..406b5eb385a5 100644
--- a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
@@ -33,6 +33,8 @@ enum cmtg {
#define TRANS_VBLANK_CMTG(id) _MMIO(0x6F010 + (id) * 0x100)
#define TRANS_VSYNC_CMTG(id) _MMIO(0x6F014 + (id) * 0x100)
+#define TRANS_SET_CTX_LATENCY_CMTG(id) _MMIO(0x6F07C + (id) * 0x100)
+
#define TRANS_VRR_CTL_CMTG(id) _MMIO(0x6F420 + (id) * 0x100)
#define TRANS_VRR_VMAX_CMTG(id) _MMIO(0x6F424 + (id) * 0x100)
#define TRANS_VRR_VMIN_CMTG(id) _MMIO(0x6F434 + (id) * 0x100)
--
2.29.0
