> -----Original Message----- > From: Nikula, Jani <[email protected]> > Sent: Wednesday, December 17, 2025 7:28 PM > To: Shankar, Uma <[email protected]>; [email protected]; > [email protected] > Cc: [email protected]; Shankar, Uma <[email protected]> > Subject: Re: [PATCH 01/19] drm/{i915, xe}: Extract common registers into a > separate file > > On Wed, 17 Dec 2025, Uma Shankar <[email protected]> wrote: > > There are certain register definitions which are commonly shared by > > i915, xe and display. Extract the same to a common header to avoid > > duplication. > > I think TRANS_CHICKEN2 should be moved to intel_display_regs.h instead of > something under include/drm/intel. The goal is that the display specific > parts of > intel_clock_gating.c should be moved there too.
Oh ok, got it Jani. Will update this and send out a next version. Regards, Uma Shankar > BR, > Jani. > > > > > > Signed-off-by: Uma Shankar <[email protected]> > > --- > > .../gpu/drm/i915/display/intel_pch_display.c | 2 +- > > drivers/gpu/drm/i915/i915_reg.h | 11 +---------- > > include/drm/intel/intel_gmd_common_regs.h | 17 +++++++++++++++++ > > 3 files changed, 19 insertions(+), 11 deletions(-) create mode > > 100644 include/drm/intel/intel_gmd_common_regs.h > > > > diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.c > > b/drivers/gpu/drm/i915/display/intel_pch_display.c > > index 16619f7be5f8..2f39ff32c6d5 100644 > > --- a/drivers/gpu/drm/i915/display/intel_pch_display.c > > +++ b/drivers/gpu/drm/i915/display/intel_pch_display.c > > @@ -4,9 +4,9 @@ > > */ > > > > #include <drm/drm_print.h> > > +#include <drm/intel/intel_gmd_common_regs.h> > > > > #include "g4x_dp.h" > > -#include "i915_reg.h" > > #include "intel_crt.h" > > #include "intel_crt_regs.h" > > #include "intel_de.h" > > diff --git a/drivers/gpu/drm/i915/i915_reg.h > > b/drivers/gpu/drm/i915/i915_reg.h index 5bf3b4ab2baa..f60259c41c56 > > 100644 > > --- a/drivers/gpu/drm/i915/i915_reg.h > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > @@ -25,6 +25,7 @@ > > #ifndef _I915_REG_H_ > > #define _I915_REG_H_ > > > > +#include <drm/intel/intel_gmd_common_regs.h> > > #include "i915_reg_defs.h" > > #include "display/intel_display_reg_defs.h" > > > > @@ -1022,16 +1023,6 @@ > > #define TRANS_CHICKEN1_HDMIUNIT_GC_DISABLE REG_BIT(10) > > #define TRANS_CHICKEN1_DP0UNIT_GC_DISABLE REG_BIT(4) > > > > -#define _TRANSA_CHICKEN2 0xf0064 > > -#define _TRANSB_CHICKEN2 0xf1064 > > -#define TRANS_CHICKEN2(pipe) _MMIO_PIPE(pipe, > _TRANSA_CHICKEN2, _TRANSB_CHICKEN2) > > -#define TRANS_CHICKEN2_TIMING_OVERRIDE REG_BIT(31) > > -#define TRANS_CHICKEN2_FDI_POLARITY_REVERSED > REG_BIT(29) > > -#define TRANS_CHICKEN2_FRAME_START_DELAY_MASK > REG_GENMASK(28, 27) > > -#define TRANS_CHICKEN2_FRAME_START_DELAY(x) > REG_FIELD_PREP(TRANS_CHICKEN2_FRAME_START_DELAY_MASK, > (x)) /* 0-3 */ > > -#define TRANS_CHICKEN2_DISABLE_DEEP_COLOR_COUNTER > REG_BIT(26) > > -#define TRANS_CHICKEN2_DISABLE_DEEP_COLOR_MODESWITCH > REG_BIT(25) > > - > > #define SOUTH_CHICKEN1 _MMIO(0xc2000) > > #define FDIA_PHASE_SYNC_SHIFT_OVR 19 > > #define FDIA_PHASE_SYNC_SHIFT_EN 18 > > diff --git a/include/drm/intel/intel_gmd_common_regs.h > > b/include/drm/intel/intel_gmd_common_regs.h > > new file mode 100644 > > index 000000000000..4d91bc2dbb27 > > --- /dev/null > > +++ b/include/drm/intel/intel_gmd_common_regs.h > > @@ -0,0 +1,17 @@ > > +/* SPDX-License-Identifier: MIT */ > > +/* Copyright © 2025 Intel Corporation */ > > + > > +#ifndef _INTEL_GMD_COMMON_REG_H_ > > +#define _INTEL_GMD_COMMON_REG_H_ > > + > > +#define _TRANSA_CHICKEN2 0xf0064 > > +#define _TRANSB_CHICKEN2 0xf1064 > > +#define TRANS_CHICKEN2(pipe) _MMIO_PIPE(pipe, > _TRANSA_CHICKEN2, _TRANSB_CHICKEN2) > > +#define TRANS_CHICKEN2_TIMING_OVERRIDE REG_BIT(31) > > +#define TRANS_CHICKEN2_FDI_POLARITY_REVERSED > REG_BIT(29) > > +#define TRANS_CHICKEN2_FRAME_START_DELAY_MASK > REG_GENMASK(28, 27) > > +#define TRANS_CHICKEN2_FRAME_START_DELAY(x) > REG_FIELD_PREP(TRANS_CHICKEN2_FRAME_START_DELAY_MASK, > (x)) /* 0-3 */ > > +#define TRANS_CHICKEN2_DISABLE_DEEP_COLOR_COUNTER > REG_BIT(26) > > +#define TRANS_CHICKEN2_DISABLE_DEEP_COLOR_MODESWITCH > REG_BIT(25) > > + > > +#endif > > -- > Jani Nikula, Intel
