Move GEN2_ISR and some interrupt definitions to common header.
This removes dependency of i915_reg.h from intel_overlay.c.

Signed-off-by: Uma Shankar <[email protected]>
---
 drivers/gpu/drm/i915/display/intel_overlay.c |  2 +-
 drivers/gpu/drm/i915/i915_reg.h              | 36 -------------------
 include/drm/intel/intel_gmd_common_regs.h    | 38 ++++++++++++++++++++
 3 files changed, 39 insertions(+), 37 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c 
b/drivers/gpu/drm/i915/display/intel_overlay.c
index 88eb7ae5765c..62026f7f71d3 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -28,6 +28,7 @@
 
 #include <drm/drm_fourcc.h>
 #include <drm/drm_print.h>
+#include <drm/intel/intel_gmd_common_regs.h>
 
 #include "gem/i915_gem_internal.h"
 #include "gem/i915_gem_object_frontbuffer.h"
@@ -37,7 +38,6 @@
 #include "gt/intel_ring.h"
 
 #include "i915_drv.h"
-#include "i915_reg.h"
 #include "intel_color_regs.h"
 #include "intel_de.h"
 #include "intel_display_regs.h"
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index e807be4a9962..ec80c21f88b8 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -522,42 +522,6 @@
 /* These are all the "old" interrupts */
 #define ILK_BSD_USER_INTERRUPT                         (1 << 5)
 
-#define I915_PM_INTERRUPT                              (1 << 31)
-#define I915_ISP_INTERRUPT                             (1 << 22)
-#define I915_LPE_PIPE_B_INTERRUPT                      (1 << 21)
-#define I915_LPE_PIPE_A_INTERRUPT                      (1 << 20)
-#define I915_MIPIC_INTERRUPT                           (1 << 19)
-#define I915_MIPIA_INTERRUPT                           (1 << 18)
-#define I915_PIPE_CONTROL_NOTIFY_INTERRUPT             (1 << 18)
-#define I915_DISPLAY_PORT_INTERRUPT                    (1 << 17)
-#define I915_DISPLAY_PIPE_C_HBLANK_INTERRUPT           (1 << 16)
-#define I915_MASTER_ERROR_INTERRUPT                    (1 << 15)
-#define I915_DISPLAY_PIPE_B_HBLANK_INTERRUPT           (1 << 14)
-#define I915_GMCH_THERMAL_SENSOR_EVENT_INTERRUPT       (1 << 14) /* p-state */
-#define I915_DISPLAY_PIPE_A_HBLANK_INTERRUPT           (1 << 13)
-#define I915_HWB_OOM_INTERRUPT                         (1 << 13)
-#define I915_LPE_PIPE_C_INTERRUPT                      (1 << 12)
-#define I915_SYNC_STATUS_INTERRUPT                     (1 << 12)
-#define I915_MISC_INTERRUPT                            (1 << 11)
-#define I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT    (1 << 11)
-#define I915_DISPLAY_PIPE_C_VBLANK_INTERRUPT           (1 << 10)
-#define I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT    (1 << 10)
-#define I915_DISPLAY_PIPE_C_EVENT_INTERRUPT            (1 << 9)
-#define I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT      (1 << 9)
-#define I915_DISPLAY_PIPE_C_DPBM_INTERRUPT             (1 << 8)
-#define I915_DISPLAY_PLANE_C_FLIP_PENDING_INTERRUPT    (1 << 8)
-#define I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT           (1 << 7)
-#define I915_DISPLAY_PIPE_A_EVENT_INTERRUPT            (1 << 6)
-#define I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT           (1 << 5)
-#define I915_DISPLAY_PIPE_B_EVENT_INTERRUPT            (1 << 4)
-#define I915_DISPLAY_PIPE_A_DPBM_INTERRUPT             (1 << 3)
-#define I915_DISPLAY_PIPE_B_DPBM_INTERRUPT             (1 << 2)
-#define I915_DEBUG_INTERRUPT                           (1 << 2)
-#define I915_WINVALID_INTERRUPT                                (1 << 1)
-#define I915_USER_INTERRUPT                            (1 << 1)
-#define I915_ASLE_INTERRUPT                            (1 << 0)
-#define I915_BSD_USER_INTERRUPT                                (1 << 25)
-
 #define GEN6_BSD_RNCID                 _MMIO(0x12198)
 
 #define GEN7_FF_THREAD_MODE            _MMIO(0x20a0)
diff --git a/include/drm/intel/intel_gmd_common_regs.h 
b/include/drm/intel/intel_gmd_common_regs.h
index 1908c203d54c..6d302fb8aa94 100644
--- a/include/drm/intel/intel_gmd_common_regs.h
+++ b/include/drm/intel/intel_gmd_common_regs.h
@@ -219,4 +219,42 @@
 #define   GMD_ID_RELEASE_MASK                  REG_GENMASK(21, 14)
 #define   GMD_ID_STEP                          REG_GENMASK(5, 0)
 
+#define GEN2_ISR       _MMIO(0x20ac)
+
+#define I915_PM_INTERRUPT                              (1 << 31)
+#define I915_ISP_INTERRUPT                             (1 << 22)
+#define I915_LPE_PIPE_B_INTERRUPT                      (1 << 21)
+#define I915_LPE_PIPE_A_INTERRUPT                      (1 << 20)
+#define I915_MIPIC_INTERRUPT                           (1 << 19)
+#define I915_MIPIA_INTERRUPT                           (1 << 18)
+#define I915_PIPE_CONTROL_NOTIFY_INTERRUPT             (1 << 18)
+#define I915_DISPLAY_PORT_INTERRUPT                    (1 << 17)
+#define I915_DISPLAY_PIPE_C_HBLANK_INTERRUPT           (1 << 16)
+#define I915_MASTER_ERROR_INTERRUPT                    (1 << 15)
+#define I915_DISPLAY_PIPE_B_HBLANK_INTERRUPT           (1 << 14)
+#define I915_GMCH_THERMAL_SENSOR_EVENT_INTERRUPT       (1 << 14) /* p-state */
+#define I915_DISPLAY_PIPE_A_HBLANK_INTERRUPT           (1 << 13)
+#define I915_HWB_OOM_INTERRUPT                         (1 << 13)
+#define I915_LPE_PIPE_C_INTERRUPT                      (1 << 12)
+#define I915_SYNC_STATUS_INTERRUPT                     (1 << 12)
+#define I915_MISC_INTERRUPT                            (1 << 11)
+#define I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT    (1 << 11)
+#define I915_DISPLAY_PIPE_C_VBLANK_INTERRUPT           (1 << 10)
+#define I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT    (1 << 10)
+#define I915_DISPLAY_PIPE_C_EVENT_INTERRUPT            (1 << 9)
+#define I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT      (1 << 9)
+#define I915_DISPLAY_PIPE_C_DPBM_INTERRUPT             (1 << 8)
+#define I915_DISPLAY_PLANE_C_FLIP_PENDING_INTERRUPT    (1 << 8)
+#define I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT           (1 << 7)
+#define I915_DISPLAY_PIPE_A_EVENT_INTERRUPT            (1 << 6)
+#define I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT           (1 << 5)
+#define I915_DISPLAY_PIPE_B_EVENT_INTERRUPT            (1 << 4)
+#define I915_DISPLAY_PIPE_A_DPBM_INTERRUPT             (1 << 3)
+#define I915_DISPLAY_PIPE_B_DPBM_INTERRUPT             (1 << 2)
+#define I915_DEBUG_INTERRUPT                           (1 << 2)
+#define I915_WINVALID_INTERRUPT                                (1 << 1)
+#define I915_USER_INTERRUPT                            (1 << 1)
+#define I915_ASLE_INTERRUPT                            (1 << 0)
+#define I915_BSD_USER_INTERRUPT                                (1 << 25)
+
 #endif
-- 
2.50.1

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