On Tue, 09 Dec 2025, Dibin Moolakadan Subrahmanian
<[email protected]> wrote:
> Introduce a bitmask enum intel_dc3co_source to record which display
> features (PSR2, ALPM, LOBF) contribute to allowing DC3CO entry.
> The source tracking is added here and will be integrated into the DC3CO
> allow logic in follow-up commits.
> Signed-off-by: Dibin Moolakadan Subrahmanian
> <[email protected]>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 11 +++++++++++
> drivers/gpu/drm/i915/display/intel_display.h | 4 +++-
> drivers/gpu/drm/i915/display/intel_display_core.h | 1 +
> drivers/gpu/drm/i915/display/intel_display_power.h | 10 ++++++++++
> 4 files changed, 25 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 205f55a87736..b14a1c9f80bd 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -6300,6 +6300,16 @@ bool intel_dc3co_allowed(struct intel_display *display)
> return display->power.dc3co_allow;
> }
>
> +void intel_dc3co_source_set(struct intel_display *display, enum
> intel_dc3co_source source)
> +{
> + display->power.dc3co_source |= source;
> +}
> +
> +void intel_dc3co_source_unset(struct intel_display *display, enum
> intel_dc3co_source source)
> +{
> + display->power.dc3co_source &= ~source;
> +}
> +
These don't belong in intel_display.[ch].
> static bool intel_dc3co_port_pipe_compatible(struct intel_dp *intel_dp,
> const struct intel_crtc_state
> *crtc_state)
> {
> @@ -6330,6 +6340,7 @@ static void intel_dc3co_allow_check(struct
> intel_atomic_state *state)
> bool allow = true;
>
> display->power.dc3co_allow = 0;
> + intel_dc3co_source_unset(display, DC3CO_SOURCE_ALL);
>
> if ((power_domains->allowed_dc_mask & DC_STATE_EN_UPTO_DC3CO) !=
> DC_STATE_EN_UPTO_DC3CO)
> return;
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h
> b/drivers/gpu/drm/i915/display/intel_display.h
> index 97987f082560..87bbf1f66209 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -46,6 +46,7 @@ struct intel_link_m_n;
> struct intel_plane;
> struct intel_plane_state;
> struct intel_power_domain_mask;
> +enum intel_dc3co_source;
>
> #define pipe_name(p) ((p) + 'A')
>
> @@ -561,5 +562,6 @@ bool assert_port_valid(struct intel_display *display,
> enum port port);
> bool intel_scanout_needs_vtd_wa(struct intel_display *display);
> int intel_crtc_num_joined_pipes(const struct intel_crtc_state *crtc_state);
> bool intel_dc3co_allowed(struct intel_display *display);
> -
> +void intel_dc3co_source_set(struct intel_display *display, enum
> intel_dc3co_source source);
> +void intel_dc3co_source_unset(struct intel_display *display, enum
> intel_dc3co_source source);
> #endif
> diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h
> b/drivers/gpu/drm/i915/display/intel_display_core.h
> index fa567c95029c..4ce34c567dbd 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_core.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_core.h
> @@ -541,6 +541,7 @@ struct intel_display {
>
> /* mark dc3co entry is allowed*/
> bool dc3co_allow;
> + u32 dc3co_source;
> } power;
>
> struct {
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h
> b/drivers/gpu/drm/i915/display/intel_display_power.h
> index d616d5d09cbe..dde07f931963 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.h
> @@ -131,6 +131,16 @@ struct intel_power_domain_mask {
> DECLARE_BITMAP(bits, POWER_DOMAIN_NUM);
> };
>
> +enum intel_dc3co_source {
> + DC3CO_SOURCE_NONE = 0,
> + DC3CO_SOURCE_PSR2 = BIT(0),
> + DC3CO_SOURCE_ALPM = BIT(1),
> + DC3CO_SOURCE_LOBF = BIT(2),
> + DC3CO_SOURCE_ALL = DC3CO_SOURCE_PSR2 |
> + DC3CO_SOURCE_ALPM |
> + DC3CO_SOURCE_LOBF,
> +};
> +
> struct i915_power_domains {
> /*
> * Power wells needed for initialization at driver init and suspend
--
Jani Nikula, Intel
