From: Daniel Vetter <daniel.vet...@intel.com>
We need to make sure we don't put garbage into the hw if dmc firmware
loading failed mid-thru.
Cc: Damien Lespiau <damien.lesp...@intel.com>
Cc: Imre Deak <imre.d...@intel.com>
Cc: Sunil Kamath <sunil.kam...@intel.com>
Signed-off-by: Daniel Vetter <daniel.vet...@intel.com>
Signed-off-by: Animesh Manna <animesh.ma...@intel.com>
---
drivers/gpu/drm/i915/intel_csr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
index 9971794..9ed513c 100644
--- a/drivers/gpu/drm/i915/intel_csr.c
+++ b/drivers/gpu/drm/i915/intel_csr.c
@@ -208,7 +208,7 @@ void intel_csr_load_program(struct drm_device *dev)
* This condition will help to check if csr address space is reset/
* not loaded.
*/
- if (I915_READ(CSR_PROGRAM_BASE))
+ if ((!dev_priv->csr.dmc_payload) || I915_READ(CSR_PROGRAM_BASE))
return;
fw_size = dev_priv->csr.dmc_fw_size;
--
2.0.2
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