Laurent Vivier wrote: >> >> Edge-triggered means we can't share interrupt lines. Since we have only >> two or three that limits the number of devices we can have. >> >> So I'd like to try moving to active low pci interrupts, and implementing >> polarity in the qemu ioapic. It's probably closer to real hardware anyway. >> >> > > Avi, > > I've two questions: > > - why, when you implemented the ioapic polarity bit in kvm (commit > 0203e2d5d0d0cea6eed6e437d9456aad71135913, kvm_ioapic_set_irq()), you > didn't implement it in qemu (in qemu/hw/apic.c ioapic_set_irq()) ? >
Laziness > - why implementing polarity changes active level in ACPI ? > Qemu has two bugs: - ACPI (and MP-BIOS) advertises the PCI interrupts as active low - IOAPIC polarity is not implemented The bugs cancel each other out. I fixed one by implementing polarity, now we have to fix the other. -- Any sufficiently difficult bug is indistinguishable from a feature. ------------------------------------------------------------------------- This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ _______________________________________________ kvm-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/kvm-devel
