On 10/15/07, Gerd Hoffmann <[EMAIL PROTECTED]> wrote:
>
> Host should know.  Well, I hope.  Dunno whenever one really can be sure
> in all cases given all the different CPUs and tsc implementations.

In the same way we can be sure about hardware for everything else:
Well... not being _quite_ sure ;-)

> With VT you can attempt to make that invisible to the guest using the
> tsc offset field.  Probably svm can do that too (didn't check docs
> though).  kvm-lite can't (what is the status btw?).  Xen "solves" that
> by not doing power management *evil grin*.

Well, my previous understanding was that if the CPU marks the tsc as
stable, it _won't_ stop even in C3, and it was done this way exactly
to make sure there are a stable source for timing.

But it does not really matter. We have two options:
* Not considering tsc stable at all if sleeps, and then using the tsc
just for adjustments.
* Considering the tsc stable, but taking the time the cpu spend
sleeping into account, and returning some sorf of "return tsc +
total_time_spent_sleeping_in_so_deep_sleep_states_such_as_C3" . I
specially liked the naming.

> Nevertheless it is probably much easier to go with pv timers (or maybe
> emulate hpet timers).

At this time, I am for pv timers. (Why would I have written it in the
first place??). But indeed, a discussion about the emulation
alternative is healthy.

-- 
Glauber de Oliveira Costa.
"Free as in Freedom"
http://glommer.net

"The less confident you are, the more serious you have to act."

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