On 2014-01-16 15:07, Paolo Bonzini wrote: > Il 04/01/2014 18:47, Jan Kiszka ha scritto: >> + u64 old_state = vcpu->arch.apic_base & >> + (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE); >> + u64 new_state = msr_info->data & >> + (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE); >> + u64 reserved_bits = ((~0ULL) << boot_cpu_data.x86_phys_bits) | 0x2ff | >> + (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE); >> + > > Should this use the guest CPUID instead?
Hmm, they may differ... Then yes. > >> + if (!msr_info->host_initiated && > > Is this check on host_initiated just for backwards compatibility, or is > there another case that I am missing? The path is taken for both host-initiated and guest-initiated APICBASE updates. Host-initiated ones are allowed to perform architecturally invalid state transitions. And the MSR is emulated, so if they like to set a reserved bit... Jan -- Siemens AG, Corporate Technology, CT RTC ITP SES-DE Corporate Competence Center Embedded Linux -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
