> I had initialized the SDRAM controller according to the state machine given > in the SA1110 manual. My problem is that I am not to able run the SDRAM at > the full memory clock frequency ,and it is always running at only at half > the memory clock frequency.
Have you checked bit 18 (K0DB2) of the MDREFR register (SA1110 developer's manual pg. 10-15, section 10.2.2)?? > This I verified by a memory test program. The > test works well at 25.8 but not at 51.6 Mhz. Again when I configured the > processor to run at 147.5 Mhz it ran at 36.875 Mhz but not at half the speed. > I have used Non delayed latching as per the guidelines given in the SA1110 > manual. In order for your RAM to work at 60MHz, it should have a "Tac" of about 6ns or better (and *not* use delayed latching). Otherwise forget it. In general if you are not using delayed latching you must make sure that: SDRAM's(Tac) <= Tmem - 9.3ns This means that for speeds *above* about 60Mhz you *should* use delayed latching. And it's funny that it is still not sure that it will work (strange as it may sound)! As a rule of thumb, when using *delayed latching*, at say ~69MHz, the critical thing is to make sure that you RAM has a Toh >= ~4.7ns. Anyway there was a discussion on the list a few months ago about these isuues, which was pretty detailed and conclusive. I think you will find all the answers you want there. Search for subject "SA1110 SDRAM timing calculations". Regards Nick Patavalis Senior Engineer Software Engineering Group inAccess Networks, SA -- flowchart, v.: To obfuscate (a problem) with esoteric cartoons. -- Stan Kelly-Bootle _______________________________________________ http://lists.arm.linux.org.uk/mailman/listinfo/linux-arm Please visit the above address for information on this list.
