Harishankkar wrote: > Also I would like to know about the Errata mentioned in April 2001 > specification update. > Problem 13 page 23 says > Corruption of internal register reads/writes following SDRAM/SMROM reads
> Does this mean that the workaround is the fix mentioned ? No, I think the problem existed for steppings A0, B0 and B1 and was fixed with B2 (see also Page 13). The workaround was only necessary for A0, B0, and B1. B2 is around for more than a year, so this problem should no longer apply. When switching between PLL frequencies, make sure to spend some ms in a loop before accessing SDRAM again, in order to avoid PLL overshoot. Regards, Klaus -- Mobotix AG Klaus Borchers Luxemburgerstr. 6 D-67657 Kaiserslautern Germany Tel: +49 (631) 3033141 Fax: +49 (631) 3033190 E-Mail: [EMAIL PROTECTED] _______________________________________________ http://lists.arm.linux.org.uk/mailman/listinfo/linux-arm Please visit the above address for information on this list.
