On Wed, Oct 28, 2015 at 05:32:15PM +0100, Boris Brezillon wrote: > On Wed, 28 Oct 2015 17:11:14 +0100 > Marek Vasut <ma...@denx.de> wrote: > > On Wednesday, October 28, 2015 at 08:58:13 AM, Boris Brezillon wrote: > > > Hi Brian, > > > > Hi, > > > > [...] > > > > > > Are > > > > there ever cases we want more than one (master) MTD per nand_chip? Or > > > > vice versa? > > > > > > Nope, I'd say that you always have a 1:1 relationship between a master > > > MTD device and a NAND device. > > > > Do some sorts of chipselects come into play here ? Ie. you can have one > > master > > with multiple NAND chips connected to it. > > Most NAND controllers support interacting with several chips (or > dies in case your chip embeds several NAND dies), but I keep thinking > each physical chip should have its own instance of nand_chip + mtd_info. > If you want to have a single mtd device aggregating several chips you > can use mtdconcat. > > This leaves the multi-dies chip case, and IHMO we should represent those > chips as a single entity, and I guess that's the purpose of the > ->numchips field in nand_chip (if your chip embeds 2 dies with 2 CS > lines, then ->numchips should be 2).
Yes, I think that's some of the intention there. And so even in that case, a multi-die chip gets represented as a single struct nand_chip. Brian -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/