On Thu, 14 Jun 2018 10:02:12 +0200 Richard Weinberger <rich...@sigma-star.at> wrote:
> Am Donnerstag, 14. Juni 2018, 09:38:35 CEST schrieb Boris Brezillon: > > On Thu, 14 Jun 2018 16:29:59 +0900 > > Masahiro Yamada <yamada.masah...@socionext.com> wrote: > > > > > Hi Richard, > > > > > > 2018-06-14 16:25 GMT+09:00 Richard Weinberger <rich...@sigma-star.at>: > > > > Masahiro, > > > > > > > > Am Donnerstag, 14. Juni 2018, 07:11:04 CEST schrieb Masahiro Yamada: > > > >> > > > >> The ->setup_data_interface() hook needs to know the clock frequency. > > > >> In fact, this IP needs three clocks, bus "which clock?" is really > > > >> confusing. (It is not described in the DT-binding at all.) > > > >> > > > >> This series adds more clocks. In the new binding, three clocks > > > >> are required: core clock, bus interface clock, ECC engine clock. > > > >> > > > >> This series also takes care of the backward compatibility by > > > >> providing hardcoded values in case the new clocks are missing. > > > >> So, existing DT should work. > > > >> > > > >> > > > >> Changes in v2: > > > >> - Split patches into sensible chunks > > > >> > > > >> Masahiro Yamada (3): > > > >> mtd: rawnand: denali_dt: use dev as a shorthand of &pdev->dev > > > >> mtd: rawnand: denali_dt: add more clocks based on IP datasheet > > > >> mtd: rawnand: denali: optimize timing parameters for data interface > > > >> > > > > > > > > This still means that we need to feed at least 2/3 and 3/3 into -stable > > > > to > > > > unbreak the driver. > > > > > > > > > 3/3 is not mandatory. > > > > > > You can only back-port 1/3 and 2/3. > > > > Well, patch 1 is not a fix, can we move it after patch 2 so that only > > patch 2 is flagged with the Fixes+Cc-stable tags? > > Another question, shall we fix arch/arm/boot/dts/socfpga.dtsi too? Yep.