On Wed, Jul 03, 2019 at 05:50:04PM +0800, Voon Weifeng wrote: > @@ -155,22 +171,26 @@ static int stmmac_mdio_read(struct mii_bus *bus, int > phyaddr, int phyreg) > struct stmmac_priv *priv = netdev_priv(ndev); > unsigned int mii_address = priv->hw->mii.addr; > unsigned int mii_data = priv->hw->mii.data; > - u32 v; > - int data; > u32 value = MII_BUSY; > + int data = 0; > + u32 v; > > value |= (phyaddr << priv->hw->mii.addr_shift) > & priv->hw->mii.addr_mask; > value |= (phyreg << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask; > value |= (priv->clk_csr << priv->hw->mii.clk_csr_shift) > & priv->hw->mii.clk_csr_mask; > - if (priv->plat->has_gmac4) > + if (priv->plat->has_gmac4) { > value |= MII_GMAC4_READ; > + if (phyreg & MII_ADDR_C45) > + stmmac_mdio_c45_setup(priv, phyreg, &value, &data); > + } > > if (readl_poll_timeout(priv->ioaddr + mii_address, v, !(v & MII_BUSY), > 100, 10000)) > return -EBUSY; > > + writel(data, priv->ioaddr + mii_data);
That looks odd. Could you explain why it is needed. Thanks Andrew