On Mon, Jul 29, 2019 at 06:14:35PM +0200, Uwe Kleine-König wrote:
> Hello Jernej,
>
> On Mon, Jul 29, 2019 at 05:48:36PM +0200, Jernej Škrabec wrote:
> > Dne ponedeljek, 29. julij 2019 ob 08:38:25 CEST je Uwe Kleine-König
> > napisal(a):
> > > Hello,
> > >
> > > On Fri, Jul 26, 2019 at 08:40:42PM +0200, Jernej Skrabec wrote:
> > > > H6 PWM core needs bus clock to be enabled in order to work.
> > > >
> > > > Add a quirk for it.
> > > >
> > > > Signed-off-by: Jernej Skrabec <jernej.skra...@siol.net>
> > > > ---
> > > >
> > > > drivers/pwm/pwm-sun4i.c | 15 +++++++++++++++
> > > > 1 file changed, 15 insertions(+)
> > > >
> > > > diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.c
> > > > index 1b7be8fbde86..7d3ac3f2dc3f 100644
> > > > --- a/drivers/pwm/pwm-sun4i.c
> > > > +++ b/drivers/pwm/pwm-sun4i.c
> > > > @@ -72,6 +72,7 @@ static const u32 prescaler_table[] = {
> > > >
> > > > };
> > > >
> > > > struct sun4i_pwm_data {
> > > >
> > > > + bool has_bus_clock;
> > > >
> > > > bool has_prescaler_bypass;
> > > > bool has_reset;
> > > > unsigned int npwm;
> > > >
> > > > @@ -79,6 +80,7 @@ struct sun4i_pwm_data {
> > > >
> > > > struct sun4i_pwm_chip {
> > > >
> > > > struct pwm_chip chip;
> > > >
> > > > + struct clk *bus_clk;
> > > >
> > > > struct clk *clk;
> > > > struct reset_control *rst;
> > > > void __iomem *base;
> > > >
> > > > @@ -382,6 +384,16 @@ static int sun4i_pwm_probe(struct platform_device
> > > > *pdev)>
> > > > reset_control_deassert(pwm->rst);
> > > >
> > > > }
> > > >
> > > > + if (pwm->data->has_bus_clock) {
> > > > + pwm->bus_clk = devm_clk_get(&pdev->dev, "bus");
> > >
> > > Similar to my suggestion in patch 2: I'd use devm_clk_get_optional() and
> > > drop struct sun4i_pwm_data::has_bus_clock.
> >
> > This one is not so simple. This patch has incorrect logic. Correct logic
> > would
> > be to use "devm_clk_get(&pdev->dev, NULL)" for variants without bus clock as
> > it is done already and "devm_clk_get(&pdev->dev, "bus")" and
> > "devm_clk_get(&pdev->dev, "mod")" for variants with bus clock.
>
> Then maybe something like the following?:
>
> busclk = devm_clk_get_optional(..., "bus");
> modclk = devm_clk_get_optional(..., "mod");
>
> /*
> * old dtbs might have a single clock but no clock names. Fall
> * back to this for compatibility reasons.
> */
> if (!modclk) {
> modclk = devm_clk_get(..., NULL);
> }Again, there's nothing optional about these clocks. You need a particular set of clocks for a given generation, and a separate set of them on another generation of SoCs. It really isn't about DT validation. We're really making sure that the device can be operational. It's as much of a validation step than making sure we have mapped registers (reg), or an interrupt if we had any. Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
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