On Fri, Oct 04, 2019 at 03:32:04PM +0200, Rasmus Villemoes wrote:
> If I'm reading of_pwm_xlate_with_flags() right, existing device trees
> that set #pwm-cells = 2 will continue to work.

Yes, that's what I expect, too.

> Signed-off-by: Rasmus Villemoes <[email protected]>
> ---
>  drivers/pwm/pwm-mxs.c | 14 ++++++++++----
>  1 file changed, 10 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/pwm/pwm-mxs.c b/drivers/pwm/pwm-mxs.c
> index 5a6835e18fc6..57562221c439 100644
> --- a/drivers/pwm/pwm-mxs.c
> +++ b/drivers/pwm/pwm-mxs.c
> @@ -25,8 +25,11 @@
>  #define  PERIOD_PERIOD(p)    ((p) & 0xffff)
>  #define  PERIOD_PERIOD_MAX   0x10000
>  #define  PERIOD_ACTIVE_HIGH  (3 << 16)
> +#define  PERIOD_ACTIVE_LOW   (2 << 16)
> +#define  PERIOD_INACTIVE_HIGH        (3 << 18)
>  #define  PERIOD_INACTIVE_LOW (2 << 18)
>  #define  PERIOD_POLARITY_NORMAL      (PERIOD_ACTIVE_HIGH | 
> PERIOD_INACTIVE_LOW)
> +#define  PERIOD_POLARITY_INVERSE     (PERIOD_ACTIVE_LOW | 
> PERIOD_INACTIVE_HIGH)
>  #define  PERIOD_CDIV(div)    (((div) & 0x7) << 20)
>  #define  PERIOD_CDIV_MAX     8
>  
> @@ -50,9 +53,7 @@ static int mxs_pwm_apply(struct pwm_chip *chip, struct 
> pwm_device *pwm,
>       unsigned int period_cycles, duty_cycles;
>       unsigned long rate;
>       unsigned long long c;
> -
> -     if (state->polarity != PWM_POLARITY_NORMAL)
> -             return -ENOTSUPP;
> +     unsigned int pol_bits;
>  
>       /*
>        * If the PWM channel is disabled, make sure to turn on the
> @@ -91,9 +92,12 @@ static int mxs_pwm_apply(struct pwm_chip *chip, struct 
> pwm_device *pwm,
>        * only take effect at the beginning of a new period, avoiding
>        * glitches.
>        */
> +
> +     pol_bits = state->polarity == PWM_POLARITY_NORMAL ?
> +             PERIOD_POLARITY_NORMAL : PERIOD_POLARITY_INVERSE;
>       writel(duty_cycles << 16,
>              mxs->base + PWM_ACTIVE0 + pwm->hwpwm * 0x20);
> -     writel(PERIOD_PERIOD(period_cycles) | PERIOD_POLARITY_NORMAL | 
> PERIOD_CDIV(div),
> +     writel(PERIOD_PERIOD(period_cycles) | pol_bits | PERIOD_CDIV(div),
>              mxs->base + PWM_PERIOD0 + pwm->hwpwm * 0x20);

Is the avoidance of glitches still true when period changes? I assume
that yes, but I wonder if you tested that.

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-König            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

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