According to the DW APB DMAC data book the minimum burst transaction length is 1 and it's true for any version of the controller since isn't parametrised in the coreAssembler so can't be changed at the IP-core synthesis stage. Let's initialise the min_burst member of the DMA controller descriptor so the DMA clients could use it to properly optimize the DMA requests.
Signed-off-by: Serge Semin <[email protected]> Cc: Alexey Malahov <[email protected]> Cc: Thomas Bogendoerfer <[email protected]> Cc: Arnd Bergmann <[email protected]> Cc: Rob Herring <[email protected]> Cc: [email protected] Cc: [email protected] --- Changelog v4: - This is a new patch suggested by Andy. --- drivers/dma/dw/core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c index ceded21537e2..a8cebb1dbb68 100644 --- a/drivers/dma/dw/core.c +++ b/drivers/dma/dw/core.c @@ -1229,6 +1229,7 @@ int do_dma_probe(struct dw_dma_chip *chip) dw->dma.device_issue_pending = dwc_issue_pending; /* DMA capabilities */ + dw->dma.min_burst = 1; dw->dma.src_addr_widths = DW_DMA_BUSWIDTHS; dw->dma.dst_addr_widths = DW_DMA_BUSWIDTHS; dw->dma.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV) | -- 2.26.2
