On Fri, May 29, 2020 at 01:23:59AM +0300, Serge Semin wrote:
> According to the DW APB DMAC data book the minimum burst transaction
> length is 1 and it's true for any version of the controller since
> isn't parametrised in the coreAssembler so can't be changed at the
> IP-core synthesis stage. Let's initialise the min_burst member of the
> DMA controller descriptor so the DMA clients could use it to properly
> optimize the DMA requests.
> @@ -1229,6 +1229,7 @@ int do_dma_probe(struct dw_dma_chip *chip)
> dw->dma.device_issue_pending = dwc_issue_pending;
>
> /* DMA capabilities */
> + dw->dma.min_burst = 1;
Perhaps then relaxed maximum, like
dw->dma.max_burst = 256;
(channels will update this)
?
> dw->dma.src_addr_widths = DW_DMA_BUSWIDTHS;
> dw->dma.dst_addr_widths = DW_DMA_BUSWIDTHS;
> dw->dma.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV) |
> --
> 2.26.2
>
--
With Best Regards,
Andy Shevchenko
