Re: [PATCH RFC V2 04/17] x86/pks: Preserve the PKRS MSR on context switch

[Peter Zijlstra]

On Fri, Jul 17, 2020 at 12:20:43AM -0700, ira.we...@intel.com wrote:
> +/*
> + * Write the PKey Register Supervisor.  This must be run with preemption
> + * disabled as it does not guarantee the atomicity of updating the pkrs_cache
> + * and MSR on its own.
> + */
> +void write_pkrs(u32 pkrs_val)
> +{
> +     this_cpu_write(pkrs_cache, pkrs_val);
> +     wrmsrl(MSR_IA32_PKRS, pkrs_val);
> +}

Should we write that like:

void write_pkrs(u32 pkr)
{
        u32 *pkrs = get_cpu_ptr(pkrs_cache);
        if (*pkrs != pkr) {
                *pkrs = pkr;
                wrmsrl(MSR_IA32_PKRS, pkr);
        }
        put_cpu_ptrpkrs_cache);
}

given that we fundamentally need to serialize againt schedule() here.