On Fri, Oct 30, 2020 at 12:29:50PM -0500, Dan Murphy wrote:
> The DP83TD510E is an ultra-low power Ethernet physical layer transceiver
> that supports 10M single pair cable.
>
> The device supports both 2.4-V p2p and 1-V p2p output voltage as defined
> by IEEE 802.3cg 10Base-T1L specfications. These modes can be forced via
> the device tree or the device is defaulted to auto negotiation to
> determine the proper p2p voltage.
>
> Signed-off-by: Dan Murphy <dmur...@ti.com>
> ---
> drivers/net/phy/Kconfig | 6 +
> drivers/net/phy/Makefile | 1 +
> drivers/net/phy/dp83td510.c | 681 ++++++++++++++++++++++++++++++++++++
> 3 files changed, 688 insertions(+)
> create mode 100644 drivers/net/phy/dp83td510.c
>
(...)
> +static int dp83td510_ack_interrupt(struct phy_device *phydev)
> +{
> + int ret;
> +
> + ret = phy_read(phydev, DP83TD510_INT_REG1);
> + if (ret < 0)
> + return ret;
> +
> + ret = phy_read(phydev, DP83TD510_INT_REG2);
> + if (ret < 0)
> + return ret;
> +
> + return 0;
> +}
> +
> +static int dp83td510_config_intr(struct phy_device *phydev)
> +{
> + int int_status;
> + int gen_cfg_val;
> + int ret;
> +
> + if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
> + int_status = phy_read(phydev, DP83TD510_INT_REG1);
> + if (int_status < 0)
> + return int_status;
> +
> + int_status = (DP83TD510_INT1_ESD_EN | DP83TD510_INT1_LINK_EN |
> + DP83TD510_INT1_RHF_EN);
> +
> + ret = phy_write(phydev, DP83TD510_INT_REG1, int_status);
> + if (ret)
> + return ret;
> +
> + int_status = phy_read(phydev, DP83TD510_INT_REG2);
> + if (int_status < 0)
> + return int_status;
> +
> + int_status = (DP83TD510_INT2_POR | DP83TD510_INT2_POL |
> + DP83TD510_INT2_PAGE);
> +
> + ret = phy_write(phydev, DP83TD510_INT_REG2, int_status);
> + if (ret)
> + return ret;
> +
> + gen_cfg_val = phy_read(phydev, DP83TD510_GEN_CFG);
> + if (gen_cfg_val < 0)
> + return gen_cfg_val;
> +
> + gen_cfg_val |= DP83TD510_INT_OE | DP83TD510_INT_EN;
> +
> + } else {
> + ret = phy_write(phydev, DP83TD510_INT_REG1, 0);
> + if (ret)
> + return ret;
> +
> + ret = phy_write(phydev, DP83TD510_INT_REG2, 0);
> + if (ret)
> + return ret;
> +
> + gen_cfg_val = phy_read(phydev, DP83TD510_GEN_CFG);
> + if (gen_cfg_val < 0)
> + return gen_cfg_val;
> +
> + gen_cfg_val &= ~DP83TD510_INT_EN;
> + }
> +
> + return phy_write(phydev, DP83TD510_GEN_CFG, gen_cfg_val);
> +}
> +
I am not really sure if the shared-IRQ work in the below linked patch
set will go through, but I think it would be cleaner just to ack any
pending interrupts after you disable them.
https://lore.kernel.org/netdev/20201029100741.462818-1-ciorneiio...@gmail.com/
I see that you are reading the INT_REG1 and INT_REG2 registers
(basically servicing any pending interrupts) before enabling the IRQ.
The same reads should be done after the IRQ has been disabled.
> +static struct phy_driver dp83td510_driver[] = {
> + {
> + PHY_ID_MATCH_MODEL(DP83TD510E_PHY_ID),
> + .name = "TI DP83TD510E",
> + .probe = dp83td510_probe,
> + .config_init = dp83td510_config_init,
> + .soft_reset = dp83td510_phy_reset,
> +
> + /* IRQ related */
> + .ack_interrupt = dp83td510_ack_interrupt,
> + .config_intr = dp83td510_config_intr,
I think the PHY maintainers could comment on this more, but maybe it
would help if the driver implements the .handle_interrupt() callback
just so that I wouldn't have to touch a driver that was just added to
rework it for the shared-IRQ transition.
Ioana
