Quoting Manivannan Sadhasivam (2021-01-17 20:11:54)
> Add devicetree YAML binding for Cortex A7 PLL clock in Qualcomm
> platforms like SDX55.
> 
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasi...@linaro.org>
> ---

Applied to clk-next

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