Quoting Richard Zhu (2021-03-15 01:17:47) > In the i.MX8MP PCIe design, the PCIe PHY REF clock comes from external > OSC or internal system PLL. It is configured in the IOMUX_GPR14 register > directly, and can't be contolled by CCM at all. > Remove the PCIE PHY clock from clock driver to clean up codes. > There is only one PCIe in i.MX8MP, remove the none exist second PCIe > related clocks. > Remove the none exsits clocks IDs together. > > Signed-off-by: Richard Zhu <hongxing....@nxp.com> > Reviewed-by: Jason Liu <jason.hui....@nxp.com> > ---
Any Fixes tag?
